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drm/amdgpu: Set vmid0 PAGE_TABLE_DEPTH for GFX12.1

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GFX12.1 uses 2 level gart table. Set the context register appropriately

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harish Kasiviswanathan 2026-01-30 15:31:14 -05:00 committed by Alex Deucher
parent 73463e26f7
commit a1e0a6b552
1 changed files with 4 additions and 1 deletions
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5
drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
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@ -395,7 +395,10 @@ static void mmhub_v4_2_0_mid_enable_system_domain(struct amdgpu_device *adev,
tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
ENABLE_CONTEXT, 1);
tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
PAGE_TABLE_DEPTH, 0);
PAGE_TABLE_DEPTH, adev->gmc.vmid0_page_table_depth);
tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
PAGE_TABLE_BLOCK_SIZE,
adev->gmc.vmid0_page_table_block_size);
tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),