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drm/i915/display: Skip C10 state verification in case of fastset

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PLL's are not programmed in case of fastset so the state
verification compares bios programmed PLL values against
sw PLL values. To overcome this limitation, we can skip
the state verification for C10 in fastset case as the
driver is not writing PLL values.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231219123246.832245-1-mika.kahola@intel.com
This commit is contained in:
Mika Kahola 2023-12-19 14:32:46 +02:00
parent 2e13b5bb5e
commit a1d91c6e98
1 changed files with 3 additions and 0 deletions
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3
drivers/gpu/drm/i915/display/intel_cx0_phy.c
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@ -3009,6 +3009,9 @@ static void intel_c10pll_state_verify(const struct intel_crtc_state *state,
const struct intel_c10pll_state *mpllb_sw_state = &state->cx0pll_state.c10;
int i;
if (intel_crtc_needs_fastset(state))
return;
for (i = 0; i < ARRAY_SIZE(mpllb_sw_state->pll); i++) {
u8 expected = mpllb_sw_state->pll[i];