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drm/i915: Unconfuse pre-icl vs. icl+ intel_sagv_{pre,post}_plane_update()

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intel_sagv_{pre,post}_plane_update() can accidentally forget
to bail out early on pre-icl and proceed down the icl+ codepath
at the end of the function. Fortunately it'll bail out before
it gets too far due to old_qgv_mask==new_qgv_mask==0 so no real
bug here. But lets make the code less confusing anyway.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220214091811.13725-5-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
This commit is contained in:
Ville Syrjälä 2022-02-14 11:18:09 +02:00
parent c0299cc984
commit a19c1d00b0
1 changed files with 6 additions and 4 deletions
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10
drivers/gpu/drm/i915/intel_pm.c
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@ -3802,8 +3802,9 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
if (!new_bw_state)
return;
if (DISPLAY_VER(dev_priv) < 11 && !intel_can_enable_sagv(dev_priv, new_bw_state)) {
intel_disable_sagv(dev_priv);
if (DISPLAY_VER(dev_priv) < 11) {
if (!intel_can_enable_sagv(dev_priv, new_bw_state))
intel_disable_sagv(dev_priv);
return;
}
@ -3853,8 +3854,9 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state)
if (!new_bw_state)
return;
if (DISPLAY_VER(dev_priv) < 11 && intel_can_enable_sagv(dev_priv, new_bw_state)) {
intel_enable_sagv(dev_priv);
if (DISPLAY_VER(dev_priv) < 11) {
if (intel_can_enable_sagv(dev_priv, new_bw_state))
intel_enable_sagv(dev_priv);
return;
}