From a112f2f5171ddd6362873e31777016b40f324854 Mon Sep 17 00:00:00 2001 From: Prathamesh Shete Date: Mon, 27 Apr 2026 13:42:31 +0000 Subject: [PATCH] arm64: tegra: Add pinctrl nodes for Tegra264 Add the three pin controller (MAIN, UPHY, AON) device-tree nodes found on Tegra264. Signed-off-by: Prathamesh Shete Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra264.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi index 4073e3905f81..b141e8f884fe 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi @@ -3356,6 +3356,11 @@ i2c3: i2c@c610000 { status = "disabled"; }; + pinmux_aon: pinmux@c7a2000 { + compatible = "nvidia,tegra264-pinmux-aon"; + reg = <0x0 0x0c7a2000 0x0 0x2000>; + }; + pmc: pmc@c800000 { compatible = "nvidia,tegra264-pmc"; reg = <0x0 0x0c800000 0x0 0x100000>, @@ -3562,6 +3567,11 @@ pci@c000000 { status = "disabled"; }; + pinmux_main: pinmux@c281000 { + compatible = "nvidia,tegra264-pinmux-main"; + reg = <0x00 0x0c281000 0x0 0xc000>; + }; + gpio_main: gpio@c300000 { compatible = "nvidia,tegra264-gpio"; reg = <0x00 0x0c300000 0x0 0x4000>, @@ -3945,6 +3955,11 @@ bus@a800000000 { <0x00 0x20000000 0x00 0x20000000 0x00 0x60000000>, /* non-prefetchable memory (32-bit, 1536 GiB) */ <0xa8 0x80000000 0xa8 0x80000000 0x57 0x80000000>; /* I/O, ECAM, prefetchable memory (64-bit) */ + pinmux_uphy: pinmux@82e0000 { + compatible = "nvidia,tegra264-pinmux-uphy"; + reg = <0x00 0x082e0000 0x0 0x4000>; + }; + gpio_uphy: gpio@8300000 { compatible = "nvidia,tegra264-gpio-uphy"; reg = <0x00 0x08300000 0x0 0x2000>,