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arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7

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Use the same order of USB 3.0 DRD controller clocks as in Exynos5433.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220129193646.372481-1-krzysztof.kozlowski@canonical.com
This commit is contained in:
Krzysztof Kozlowski 2022-01-29 20:36:39 +01:00
parent ff72497f57
commit a0d5455330
1 changed files with 2 additions and 3 deletions
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5
arch/arm64/boot/dts/exynos/exynos7.dtsi
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@ -684,11 +684,10 @@ usbdrd_phy: phy@15500000 {
reg = <0x15500000 0x100>;
clocks = <&clock_fsys0 ACLK_USBDRD300>,
<&clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY>,
<&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,
<&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>,
<&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,
<&clock_fsys0 SCLK_USBDRD300_REFCLK>;
clock-names = "phy", "ref", "phy_pipe",
"phy_utmi", "itp";
clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <1>;
};