From a09a80b44b155e932601292b467d8445a556fd91 Mon Sep 17 00:00:00 2001 From: Val Packett Date: Tue, 3 Mar 2026 00:41:23 -0300 Subject: [PATCH] clk: qcom: dispcc-sm6125: Add missing MDSS resets The MDSS resets were left undescribed. Add them to allow resetting the display subsystem, which is necessary to avoid issues caused by state left over from the bootloader on various platforms. Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Val Packett Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20260303034847.13870-5-val@packett.cool Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/dispcc-sm6125.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm6125.c b/drivers/clk/qcom/dispcc-sm6125.c index 851d38a487d3..2c67abcfef12 100644 --- a/drivers/clk/qcom/dispcc-sm6125.c +++ b/drivers/clk/qcom/dispcc-sm6125.c @@ -17,6 +17,7 @@ #include "clk-regmap.h" #include "common.h" #include "gdsc.h" +#include "reset.h" enum { P_BI_TCXO, @@ -607,6 +608,10 @@ static struct clk_branch disp_cc_xo_clk = { }, }; +static const struct qcom_reset_map disp_cc_sm6125_resets[] = { + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, +}; + static struct gdsc mdss_gdsc = { .gdscr = 0x3000, .pd = { @@ -663,6 +668,8 @@ static const struct qcom_cc_desc disp_cc_sm6125_desc = { .config = &disp_cc_sm6125_regmap_config, .clks = disp_cc_sm6125_clocks, .num_clks = ARRAY_SIZE(disp_cc_sm6125_clocks), + .resets = disp_cc_sm6125_resets, + .num_resets = ARRAY_SIZE(disp_cc_sm6125_resets), .gdscs = disp_cc_sm6125_gdscs, .num_gdscs = ARRAY_SIZE(disp_cc_sm6125_gdscs), };