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KVM: nVMX: remove unnecessary code in prepare_vmcs02_rare
The early vmwrite of the PDPTRs in prepare_vmcs02_rare() is redundant, because
every write it does will be performed by prepare_vmcs02() if it is actually
needed.
In any case where the emulator or the processor need the PDPTR, either
is_pae_paging() is true on vmentry, or a write of CR0, CR4 or EFER will
cause a vmexit to L0. The next vmentry will refresh the PDPTRs in the
vmcs02 from vmcs12.
In fact, the original version[1] of what ended up being commit
c7554efc83 ("KVM: nVMX: Copy PDPTRs to/from vmcs12 only when
necessary"), the writes in what is now prepare_vmcs02_rare() were removed.
When the mega-collection of optimizations was posted[2], the removal of
that code got dropped as a rebase good, so reinstate it.
[1] https://lore.kernel.org/all/20190507160640.4812-16-sean.j.christopherson@intel.com
[2] https://lore.kernel.org/all/1560445409-17363-31-git-send-email-pbonzini@redhat.com
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <20260530165545.25599-3-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
8503953e26
commit
9eff3e99a8
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@ -2623,17 +2623,6 @@ static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12)
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vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->guest_sysenter_esp);
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vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->guest_sysenter_eip);
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/*
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* L1 may access the L2's PDPTR, so save them to construct
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* vmcs12
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*/
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if (enable_ept) {
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vmcs_write64(GUEST_PDPTR0, vmcs12->guest_pdptr0);
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vmcs_write64(GUEST_PDPTR1, vmcs12->guest_pdptr1);
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vmcs_write64(GUEST_PDPTR2, vmcs12->guest_pdptr2);
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vmcs_write64(GUEST_PDPTR3, vmcs12->guest_pdptr3);
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}
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if (kvm_mpx_supported() && vmx->vcpu.arch.nested_run_pending &&
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(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_BNDCFGS))
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vmcs_write64(GUEST_BNDCFGS, vmcs12->guest_bndcfgs);
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