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arm64: dts: qcom: sc8280xp: drop reference-clock source

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The source clock for the reference clock should not be described by the
devicetree binding and instead this relationship should be modelled in
the clock driver.

Update the USB PHY nodes to match the fixed binding.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111093857.11360-4-johan+linaro@kernel.org
This commit is contained in:
Johan Hovold 2022-11-11 10:38:57 +01:00 committed by Bjorn Andersson
parent 64ebe7fc47
commit 9eb18ed70b
1 changed files with 2 additions and 6 deletions
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8
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
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@ -1587,12 +1587,10 @@ usb_2_qmpphy0: phy@88ef000 {
reg = <0 0x088ef000 0 0x2000>;
clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_MP0_CLKREF_CLK>,
<&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
clock-names = "aux", "ref_clk_src", "ref", "com_aux",
"pipe";
clock-names = "aux", "ref", "com_aux", "pipe";
resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
<&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
@ -1613,12 +1611,10 @@ usb_2_qmpphy1: phy@88f1000 {
reg = <0 0x088f1000 0 0x2000>;
clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_MP1_CLKREF_CLK>,
<&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_MP_PHY_PIPE_1_CLK>;
clock-names = "aux", "ref_clk_src", "ref", "com_aux",
"pipe";
clock-names = "aux", "ref", "com_aux", "pipe";
resets = <&gcc GCC_USB3_UNIPHY_MP1_BCR>,
<&gcc GCC_USB3UNIPHY_PHY_MP1_BCR>;