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amd-pstate 7.4 content (2026-09-14)
* Fix for amd-pstate-ut with 'Requested CPU Min frequency' BIOS option * New Zen6 tuning values for EPP * Documentation fix -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEECwtuSU6dXvs5GA2aLRkspiR3AnYFAmqoEmQTHHN1cGVybTFA a2VybmVsLm9yZwAKCRAtGSymJHcCdsTGD/4vBrpgo0hptJxRHuIL49JTizEZKMoC TQ3PD9P9shJvGX8CaRCUQaDfd6c5ARKlo+Sz3PFMc8Xwa8oyG+L519+1f2P6YieI mxf1wi4fZMynKWZFxemEd52z7HZTufYNrWkYWdHr9K7BxnzwIX2j2jPjVXB8GfjI fYmu0jL9gA7sMHFXwWXiTcPgghv/w1nTInHX3vIfSFGKa5L3BG02Fq3iQxl55qB+ VV0f0Mlp5hM2wkuAYtTStFhY2IP9RDpHar6umHeYfjEVsVMe8z5V2Y2aQNYnfN47 pvb8kVAr916eYxhmQPS+HrKRld4cPs7dVfOOti3CTENtcX663npNtMGOd5XIBPtP 8xxaVIb2c1oD6XKFM3iRUJKN33eYFTUi6LNWejiN4SpPe/zh9Mz6/6+dlb2VxfK0 cLDvuDC5v5fZ3Xx2tyG18UfZD50E++BefajUVF4HDRkHB3oHa1x+2SW2jl1aC79x V4xwguaOroSJiueM98yticlS/VjtR3c9ZGYcgPWUCuSTe43Vc6PF6o8hhhCOBDZB VpBifHE2fx+UEf6dsF0AIsH/tlcHlaqb74xfhx/5ysp+VOj0n4IgCxESkcL6Wsao VI2IBAH/w6fHkCaVwU5W9jklCvjpdWUO+g9avQEGgx0nO+INIA72IQpipuM5PVYg QVIqK4MPU5Lcrg== =A9lG -----END PGP SIGNATURE----- Merge tag 'amd-pstate-v7.4-2026-09-14' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Pull amd-pstate 7.4 content (2026-09-14) from Mario Limonciello: "* Fix for amd-pstate-ut with 'Requested CPU Min frequency' BIOS option * New Zen6 tuning values for EPP * Documentation fix" * tag 'amd-pstate-v7.4-2026-09-14' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq/amd-pstate: Remove obsolete amd_dynamic_epp documentation cpufreq/amd-pstate: Show a warning if missing EPP tunings cpufreq/amd-pstate: Add EPP tunings for Zen6 client platforms cpufreq/amd-pstate: Add per SoC and per core type EPP tuning values cpufreq/amd-pstate-ut: Fix amd_pstate_ut_check_freq failure with 'Requested CPU Min frequency' BIOS option
This commit is contained in:
Rafael J. Wysocki
commit
9e2055b872
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@ -501,13 +501,6 @@ Kernel parameters
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disable
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Disable amd-pstate preferred core.
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amd_dynamic_epp=
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[X86]
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disable
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Disable amd-pstate dynamic EPP.
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enable
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Enable amd-pstate dynamic EPP.
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amijoy.map= [HW,JOY] Amiga joystick support
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Map of devices attached to JOY0DAT and JOY1DAT
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Format: <a>,<b>
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@ -481,12 +481,6 @@ For systems that support ``amd-pstate`` preferred core, the core rankings will
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always be advertised by the platform. But OS can choose to ignore that via the
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kernel parameter ``amd_prefcore=disable``.
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``amd_dynamic_epp``
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When AMD pstate is in auto mode, dynamic EPP will control whether the kernel
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autonomously changes the EPP mode. The default is disabled. It can be enabled
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with the kernel parameter ``amd_dynamic_epp=enable``.
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User Space Interface in ``sysfs`` - General
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===========================================
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@ -226,11 +226,14 @@ static int amd_pstate_ut_check_freq(u32 index)
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for_each_online_cpu(cpu) {
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struct cpufreq_policy *policy __free(put_cpufreq_policy) = NULL;
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struct amd_cpudata *cpudata;
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union perf_cached perf;
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policy = cpufreq_cpu_get(cpu);
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if (!policy)
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continue;
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cpudata = policy->driver_data;
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perf = READ_ONCE(cpudata->perf);
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if (!((policy->cpuinfo.max_freq >= cpudata->nominal_freq) &&
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(cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) &&
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@ -242,7 +245,25 @@ static int amd_pstate_ut_check_freq(u32 index)
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return -EINVAL;
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}
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if (cpudata->lowest_nonlinear_freq != policy->min) {
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if (perf.bios_min_perf) {
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u32 bios_min_freq = perf_to_freq(perf, cpudata->nominal_freq,
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perf.bios_min_perf);
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/*
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* User set bios_min_freq cannot be trusted to
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* be within the driver limits. Clamp it similar
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* to cpufreq_verify_within_cpu_limits().
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*/
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bios_min_freq = clamp_t(u32, bios_min_freq,
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policy->cpuinfo.min_freq,
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policy->cpuinfo.max_freq);
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if (bios_min_freq != policy->min) {
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pr_err("%s cpu%d bios_min_freq=%d policy_min=%d, they should be equal!\n",
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__func__, cpu, bios_min_freq, policy->min);
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return -EINVAL;
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}
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} else if (cpudata->lowest_nonlinear_freq != policy->min) {
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pr_err("%s cpu%d cpudata_lowest_nonlinear_freq=%d policy_min=%d, they should be equal!\n",
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__func__, cpu, cpudata->lowest_nonlinear_freq, policy->min);
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return -EINVAL;
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@ -55,10 +55,10 @@
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#define AMD_PSTATE_TRANSITION_DELAY 1000
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#define AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY 600
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#define AMD_CPPC_EPP_PERFORMANCE 0x00
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#define AMD_CPPC_EPP_BALANCE_PERFORMANCE 0x80
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#define AMD_CPPC_EPP_BALANCE_POWERSAVE 0xBF
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#define AMD_CPPC_EPP_POWERSAVE 0xFF
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#define AMD_CPPC_EPP_LEGACY_PERFORMANCE 0x00
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#define AMD_CPPC_EPP_LEGACY_BALANCE_PERFORMANCE 0x80
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#define AMD_CPPC_EPP_LEGACY_BALANCE_POWERSAVE 0xBF
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#define AMD_CPPC_EPP_LEGACY_POWERSAVE 0xFF
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static const char * const amd_pstate_mode_string[] = {
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[AMD_PSTATE_UNDEFINED] = "undefined",
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@ -129,14 +129,112 @@ static const char * const energy_perf_strings[] = {
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};
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static_assert(ARRAY_SIZE(energy_perf_strings) == EPP_INDEX_MAX);
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static unsigned int epp_values[] = {
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[EPP_INDEX_DEFAULT] = 0,
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[EPP_INDEX_PERFORMANCE] = AMD_CPPC_EPP_PERFORMANCE,
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[EPP_INDEX_BALANCE_PERFORMANCE] = AMD_CPPC_EPP_BALANCE_PERFORMANCE,
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[EPP_INDEX_BALANCE_POWERSAVE] = AMD_CPPC_EPP_BALANCE_POWERSAVE,
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[EPP_INDEX_POWERSAVE] = AMD_CPPC_EPP_POWERSAVE,
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/*
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* The numeric EPP value programmed for each named preference. First dimension
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* is CPU type (TOPO_CPU_TYPE_ANY for non-hybrid, TOPO_CPU_TYPE_PERFORMANCE/
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* EFFICIENCY/LOW_POWER for hybrid). The initializer holds the legacy values
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* used as the fallback on any platform not listed in amd_pstate_epp_soc_ids[];
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* amd_pstate_init_epp_values() overwrites slots at boot when the running SoC
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* has a per-SoC (and potentially per-CPU-type) override.
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*/
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static u8 epp_values[][EPP_INDEX_MAX] = {
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/*
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* Initialize all CPU types to legacy defaults.
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* amd_pstate_init_epp_values() will fix these up
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* based on the platform during boot.
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*/
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[TOPO_CPU_TYPE_ANY ... TOPO_CPU_TYPE_LOW_POWER] = {
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[EPP_INDEX_DEFAULT] = 0,
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[EPP_INDEX_PERFORMANCE] = AMD_CPPC_EPP_LEGACY_PERFORMANCE,
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[EPP_INDEX_BALANCE_PERFORMANCE] = AMD_CPPC_EPP_LEGACY_BALANCE_PERFORMANCE,
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[EPP_INDEX_BALANCE_POWERSAVE] = AMD_CPPC_EPP_LEGACY_BALANCE_POWERSAVE,
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[EPP_INDEX_POWERSAVE] = AMD_CPPC_EPP_LEGACY_POWERSAVE,
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},
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};
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static_assert(ARRAY_SIZE(epp_values) == TOPO_CPU_TYPE_LOW_POWER + 1,
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"epp_values must have entries for all CPU types up to TOPO_CPU_TYPE_LOW_POWER");
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/*
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* Get the EPP value row for a given CPU, accounting for hybrid CPU types.
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* Non-hybrid systems use TOPO_CPU_TYPE_ANY; hybrid systems use the CPU's
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* actual type (PERFORMANCE/EFFICIENCY/LOW_POWER).
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*/
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static inline u8 *amd_pstate_cpu_epp_values(enum x86_topology_cpu_type cpu_type)
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{
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switch (cpu_type) {
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case TOPO_CPU_TYPE_PERFORMANCE:
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case TOPO_CPU_TYPE_EFFICIENCY:
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case TOPO_CPU_TYPE_LOW_POWER:
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return epp_values[cpu_type];
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default:
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return epp_values[TOPO_CPU_TYPE_ANY];
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}
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}
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/**
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* struct amd_pstate_epp_values - EPP values for the four named preferences
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* @performance: value for the "performance" preference
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* @balance_performance: value for the "balance_performance" preference
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* @balance_power: value for the "balance_power" preference
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* @power: value for the "power" preference
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*/
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struct amd_pstate_epp_values {
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u8 performance;
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u8 balance_performance;
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u8 balance_power;
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u8 power;
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};
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/**
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* struct amd_pstate_epp_soc - per-CPU-type EPP overrides for hybrid systems
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* @performance_core: values for TOPO_CPU_TYPE_PERFORMANCE cores
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* @efficiency_core: values for TOPO_CPU_TYPE_EFFICIENCY cores
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* @low_power_core: values for TOPO_CPU_TYPE_LOW_POWER cores
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*
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* Referenced from amd_pstate_epp_soc_ids[] to give a hybrid platform its own
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* numeric EPP values for the four named preferences, with distinct values per
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* CPU type. Non-hybrid systems are not listed in the table and always use the
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* legacy defaults.
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*/
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struct amd_pstate_epp_soc {
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struct amd_pstate_epp_values performance_core;
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struct amd_pstate_epp_values efficiency_core;
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struct amd_pstate_epp_values low_power_core;
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};
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/*
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* Per-CPU-type EPP overrides for hybrid systems. Only hybrid SoCs should be
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* listed here; non-hybrid systems always use the legacy defaults.
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*/
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static const struct amd_pstate_epp_soc epp_soc_zen6_client __initconst = {
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.performance_core = {
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.performance = 25,
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.balance_performance = 51,
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.balance_power = 64,
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.power = 64,
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},
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.efficiency_core = {
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.performance = 25,
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.balance_performance = 51,
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.balance_power = 64,
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.power = 115,
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},
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.low_power_core = {
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.performance = 25,
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.balance_performance = 51,
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.balance_power = 64,
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.power = 115,
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},
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};
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static const struct x86_cpu_id amd_pstate_epp_soc_ids[] __initconst = {
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X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x1A, 0x80, &epp_soc_zen6_client),
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X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x1A, 0x81, &epp_soc_zen6_client),
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X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x1A, 0x84, &epp_soc_zen6_client),
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X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x1A, 0x85, &epp_soc_zen6_client),
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X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x1A, 0xe0, &epp_soc_zen6_client),
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{}
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};
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static_assert(ARRAY_SIZE(epp_values) == EPP_INDEX_MAX - 2);
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typedef int (*cppc_mode_transition_fn)(int);
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@ -145,19 +243,6 @@ static struct quirk_entry quirk_amd_7k62 = {
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.lowest_freq = 550,
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};
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static inline u8 freq_to_perf(union perf_cached perf, u32 nominal_freq, unsigned int freq_val)
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{
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u32 perf_val = DIV_ROUND_UP_ULL((u64)freq_val * perf.nominal_perf, nominal_freq);
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return (u8)clamp(perf_val, perf.lowest_perf, perf.highest_perf);
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}
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static inline u32 perf_to_freq(union perf_cached perf, u32 nominal_freq, u8 perf_val)
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{
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return DIV_ROUND_UP_ULL((u64)nominal_freq * perf_val,
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perf.nominal_perf);
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}
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static int __init dmi_matched_7k62_bios_bug(const struct dmi_system_id *dmi)
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{
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/**
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@ -1068,6 +1153,7 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
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return -ENOMEM;
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cpudata->cpu = policy->cpu;
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cpudata->cpu_type = cpu_data(policy->cpu).topo.cpu_type;
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ret = amd_pstate_init_perf(cpudata);
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if (ret)
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@ -1195,13 +1281,16 @@ static int amd_pstate_power_supply_notifier(struct notifier_block *nb,
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static int amd_pstate_get_epp_from_platform_profile(struct cpufreq_policy *policy,
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enum platform_profile_option profile)
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{
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struct amd_cpudata *cpudata = policy->driver_data;
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u8 *values = amd_pstate_cpu_epp_values(cpudata->cpu_type);
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switch (profile) {
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case PLATFORM_PROFILE_PERFORMANCE:
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return AMD_CPPC_EPP_PERFORMANCE;
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return values[EPP_INDEX_PERFORMANCE];
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case PLATFORM_PROFILE_BALANCED:
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return amd_pstate_get_balanced_epp(policy);
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case PLATFORM_PROFILE_LOW_POWER:
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return AMD_CPPC_EPP_POWERSAVE;
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return values[EPP_INDEX_POWERSAVE];
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default:
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break;
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}
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@ -1411,6 +1500,7 @@ ssize_t store_energy_performance_preference(struct cpufreq_policy *policy,
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const char *buf, size_t count)
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{
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struct amd_cpudata *cpudata = policy->driver_data;
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u8 *values = amd_pstate_cpu_epp_values(cpudata->cpu_type);
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ssize_t ret;
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bool raw_epp = false;
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u8 epp;
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@ -1445,12 +1535,13 @@ ssize_t store_energy_performance_preference(struct cpufreq_policy *policy,
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}
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if (ret)
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epp = epp_values[ret];
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epp = values[ret];
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else
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epp = cpudata->epp_default_dc;
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}
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if (epp > 0 && cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) {
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if (epp > 0 && epp != values[EPP_INDEX_PERFORMANCE] &&
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cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) {
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pr_debug("EPP cannot be set under performance policy\n");
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return -EBUSY;
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}
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@ -1475,34 +1566,31 @@ EXPORT_SYMBOL_FOR_PSTATE_UT(store_energy_performance_preference);
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ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char *buf)
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{
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struct amd_cpudata *cpudata = policy->driver_data;
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u8 preference, epp;
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u8 *values = amd_pstate_cpu_epp_values(cpudata->cpu_type);
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u8 epp;
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int i;
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epp = FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached);
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if (!cpudata->dynamic_epp && cpudata->raw_epp)
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return sysfs_emit(buf, "%u\n", epp);
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switch (epp) {
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case AMD_CPPC_EPP_PERFORMANCE:
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preference = EPP_INDEX_PERFORMANCE;
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break;
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case AMD_CPPC_EPP_BALANCE_PERFORMANCE:
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preference = EPP_INDEX_BALANCE_PERFORMANCE;
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break;
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case AMD_CPPC_EPP_BALANCE_POWERSAVE:
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preference = EPP_INDEX_BALANCE_POWERSAVE;
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break;
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case AMD_CPPC_EPP_POWERSAVE:
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preference = EPP_INDEX_POWERSAVE;
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break;
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default:
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return -EINVAL;
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/*
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* Map the cached EPP value back to a named preference. Skip the
|
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* "default" slot (index 0) so an EPP of 0 reports as "performance".
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* Stop at POWERSAVE; CUSTOM and DYNAMIC are not initialized in epp_values.
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*/
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for (i = EPP_INDEX_PERFORMANCE; i <= EPP_INDEX_POWERSAVE; i++) {
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const char *name = energy_perf_strings[i];
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|
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if (epp == values[i]) {
|
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if (cpudata->dynamic_epp)
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return sysfs_emit(buf, "dynamic(profile:%s)\n", name);
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return sysfs_emit(buf, "%s\n", name);
|
||||
}
|
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}
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if (cpudata->dynamic_epp)
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return sysfs_emit(buf, "dynamic(profile:%s)\n", energy_perf_strings[preference]);
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return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]);
|
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return sysfs_emit(buf, "%u\n", epp);
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}
|
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EXPORT_SYMBOL_FOR_PSTATE_UT(show_energy_performance_preference);
|
||||
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||||
|
|
@ -1894,6 +1982,7 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
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return -ENOMEM;
|
||||
|
||||
cpudata->cpu = policy->cpu;
|
||||
cpudata->cpu_type = cpu_data(policy->cpu).topo.cpu_type;
|
||||
|
||||
ret = amd_pstate_init_perf(cpudata);
|
||||
if (ret)
|
||||
|
|
@ -1944,9 +2033,11 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
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cpudata->epp_default_ac = cpudata->epp_default_dc = default_epp;
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cpudata->current_profile = PLATFORM_PROFILE_PERFORMANCE;
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||||
} else {
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||||
u8 *values = amd_pstate_cpu_epp_values(cpudata->cpu_type);
|
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policy->policy = CPUFREQ_POLICY_POWERSAVE;
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||||
cpudata->epp_default_ac = AMD_CPPC_EPP_PERFORMANCE;
|
||||
cpudata->epp_default_dc = AMD_CPPC_EPP_BALANCE_PERFORMANCE;
|
||||
cpudata->epp_default_ac = values[EPP_INDEX_PERFORMANCE];
|
||||
cpudata->epp_default_dc = values[EPP_INDEX_BALANCE_PERFORMANCE];
|
||||
cpudata->current_profile = PLATFORM_PROFILE_BALANCED;
|
||||
}
|
||||
|
||||
|
|
@ -2245,6 +2336,38 @@ static bool amd_cppc_supported(void)
|
|||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Resolve the numeric EPP values for hybrid systems. Only hybrid SoCs are listed
|
||||
* in amd_pstate_epp_soc_ids[]; non-hybrid systems always use the legacy defaults.
|
||||
*/
|
||||
static inline void __init amd_pstate_set_epp_values(enum x86_topology_cpu_type type,
|
||||
const struct amd_pstate_epp_values *core)
|
||||
{
|
||||
epp_values[type][EPP_INDEX_PERFORMANCE] = core->performance;
|
||||
epp_values[type][EPP_INDEX_BALANCE_PERFORMANCE] = core->balance_performance;
|
||||
epp_values[type][EPP_INDEX_BALANCE_POWERSAVE] = core->balance_power;
|
||||
epp_values[type][EPP_INDEX_POWERSAVE] = core->power;
|
||||
}
|
||||
|
||||
static void __init amd_pstate_init_epp_values(void)
|
||||
{
|
||||
const struct x86_cpu_id *id = x86_match_cpu(amd_pstate_epp_soc_ids);
|
||||
const struct amd_pstate_epp_soc *soc;
|
||||
|
||||
if (!id || !id->driver_data) {
|
||||
if (cpu_feature_enabled(X86_FEATURE_ZEN6) &&
|
||||
cpu_feature_enabled(X86_FEATURE_AMD_HTR_CORES))
|
||||
pr_warn_once("No EPP tunings found for platform\n");
|
||||
return;
|
||||
}
|
||||
|
||||
soc = (const struct amd_pstate_epp_soc *)id->driver_data;
|
||||
|
||||
amd_pstate_set_epp_values(TOPO_CPU_TYPE_PERFORMANCE, &soc->performance_core);
|
||||
amd_pstate_set_epp_values(TOPO_CPU_TYPE_EFFICIENCY, &soc->efficiency_core);
|
||||
amd_pstate_set_epp_values(TOPO_CPU_TYPE_LOW_POWER, &soc->low_power_core);
|
||||
}
|
||||
|
||||
static int __init amd_pstate_init(void)
|
||||
{
|
||||
struct device *dev_root;
|
||||
|
|
@ -2272,6 +2395,9 @@ static int __init amd_pstate_init(void)
|
|||
/* check if this machine need CPPC quirks */
|
||||
dmi_check_system(amd_pstate_quirks_table);
|
||||
|
||||
/* resolve per-SoC EPP values for the named preferences */
|
||||
amd_pstate_init_epp_values();
|
||||
|
||||
/*
|
||||
* determine the driver mode from the command line or kernel config.
|
||||
* If no command line input is provided, cppc_state will be AMD_PSTATE_UNDEFINED.
|
||||
|
|
|
|||
|
|
@ -146,6 +146,8 @@ struct amd_cpudata {
|
|||
enum platform_profile_option current_profile;
|
||||
struct device *ppdev;
|
||||
char *profile_name;
|
||||
|
||||
enum x86_topology_cpu_type cpu_type;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -159,6 +161,20 @@ enum amd_pstate_mode {
|
|||
AMD_PSTATE_GUIDED,
|
||||
AMD_PSTATE_MAX,
|
||||
};
|
||||
|
||||
static inline u8 freq_to_perf(union perf_cached perf, u32 nominal_freq, unsigned int freq_val)
|
||||
{
|
||||
u32 perf_val = DIV_ROUND_UP_ULL((u64)freq_val * perf.nominal_perf, nominal_freq);
|
||||
|
||||
return (u8)clamp(perf_val, perf.lowest_perf, perf.highest_perf);
|
||||
}
|
||||
|
||||
static inline u32 perf_to_freq(union perf_cached perf, u32 nominal_freq, u8 perf_val)
|
||||
{
|
||||
return DIV_ROUND_UP_ULL((u64)nominal_freq * perf_val,
|
||||
perf.nominal_perf);
|
||||
}
|
||||
|
||||
const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode);
|
||||
int amd_pstate_get_status(void);
|
||||
int amd_pstate_update_status(const char *buf, size_t size);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user