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dt-bindings: memory: lpddr2: Convert to schema
Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-* compatibles since they were never used by device-trees and by the code. I also changed "Elpida" compatible prefix to lowercase "elpida". Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-3-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This commit is contained in:
Dmitry Osipenko
Krzysztof Kozlowski
parent
a0d245d086
commit
9e17f71e9c
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
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maintainers:
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- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- elpida,ECB240ABACN
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- enum:
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- jedec,lpddr2-s4
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- items:
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- enum:
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- jedec,lpddr2-s2
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- items:
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- enum:
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- jedec,lpddr2-nvm
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density:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Density in megabits of SDRAM chip. Obtained from device datasheet.
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enum:
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- 64
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- 128
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- 256
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- 512
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- 1024
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- 2048
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- 4096
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- 8192
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- 16384
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- 32768
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io-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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IO bus width in bits of SDRAM chip. Obtained from device datasheet.
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enum:
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- 32
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- 16
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- 8
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tRRD-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Active bank a to active bank b in terms of number of clock cycles.
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Obtained from device datasheet.
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tWTR-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Internal WRITE-to-READ command delay in terms of number of clock cycles.
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Obtained from device datasheet.
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tXP-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Exit power-down to next valid command delay in terms of number of clock
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cycles. Obtained from device datasheet.
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tRTP-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Internal READ to PRECHARGE command delay in terms of number of clock
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cycles. Obtained from device datasheet.
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tCKE-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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CKE minimum pulse width (HIGH and LOW pulse width) in terms of number
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of clock cycles. Obtained from device datasheet.
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tRPab-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Row precharge time (all banks) in terms of number of clock cycles.
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Obtained from device datasheet.
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tRCD-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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RAS-to-CAS delay in terms of number of clock cycles. Obtained from
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device datasheet.
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tWR-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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WRITE recovery time in terms of number of clock cycles. Obtained from
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device datasheet.
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tRASmin-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Row active time in terms of number of clock cycles. Obtained from device
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datasheet.
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tCKESR-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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CKE minimum pulse width during SELF REFRESH (low pulse width during
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SELF REFRESH) in terms of number of clock cycles. Obtained from device
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datasheet.
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tFAW-min-tck:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 16
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description: |
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Four-bank activate window in terms of number of clock cycles. Obtained
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from device datasheet.
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patternProperties:
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"^lpddr2-timings":
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type: object
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description: |
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The lpddr2 node may have one or more child nodes of type "lpddr2-timings".
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"lpddr2-timings" provides AC timing parameters of the device for
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a given speed-bin. The user may provide the timings for as many
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speed-bins as is required. Please see Documentation/devicetree/
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bindings/memory-controllers/ddr/lpddr2-timings.txt for more information
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on "lpddr2-timings".
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required:
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- compatible
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- density
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- io-width
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additionalProperties: false
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examples:
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- |
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elpida_ECB240ABACN: lpddr2 {
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compatible = "elpida,ECB240ABACN", "jedec,lpddr2-s4";
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density = <2048>;
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io-width = <32>;
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tRPab-min-tck = <3>;
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tRCD-min-tck = <3>;
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tWR-min-tck = <3>;
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tRASmin-min-tck = <3>;
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tRRD-min-tck = <2>;
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tWTR-min-tck = <2>;
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tXP-min-tck = <2>;
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tRTP-min-tck = <2>;
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tCKE-min-tck = <3>;
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tCKESR-min-tck = <3>;
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tFAW-min-tck = <8>;
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timings_elpida_ECB240ABACN_400mhz: lpddr2-timings0 {
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compatible = "jedec,lpddr2-timings";
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min-freq = <10000000>;
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max-freq = <400000000>;
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tRPab = <21000>;
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tRCD = <18000>;
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tWR = <15000>;
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tRAS-min = <42000>;
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tRRD = <10000>;
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tWTR = <7500>;
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tXP = <7500>;
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tRTP = <7500>;
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tCKESR = <15000>;
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tDQSCK-max = <5500>;
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tFAW = <50000>;
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tZQCS = <90000>;
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tZQCL = <360000>;
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tZQinit = <1000000>;
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tRAS-max-ns = <70000>;
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};
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timings_elpida_ECB240ABACN_200mhz: lpddr2-timings1 {
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compatible = "jedec,lpddr2-timings";
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min-freq = <10000000>;
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max-freq = <200000000>;
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tRPab = <21000>;
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tRCD = <18000>;
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tWR = <15000>;
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tRAS-min = <42000>;
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tRRD = <10000>;
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tWTR = <10000>;
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tXP = <7500>;
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tRTP = <7500>;
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tCKESR = <15000>;
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tDQSCK-max = <5500>;
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tFAW = <50000>;
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tZQCS = <90000>;
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tZQCL = <360000>;
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tZQinit = <1000000>;
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tRAS-max-ns = <70000>;
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};
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};
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@ -1,102 +0,0 @@
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* LPDDR2 SDRAM memories compliant to JEDEC JESD209-2
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Required properties:
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- compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2",
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"jedec,lpddr2-s4"
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"ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type
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"ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type
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"ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type
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- density : <u32> representing density in Mb (Mega bits)
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- io-width : <u32> representing bus width. Possible values are 8, 16, and 32
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Optional properties:
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The following optional properties represent the minimum value of some AC
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timing parameters of the DDR device in terms of number of clock cycles.
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These values shall be obtained from the device data-sheet.
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- tRRD-min-tck
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- tWTR-min-tck
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- tXP-min-tck
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- tRTP-min-tck
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- tCKE-min-tck
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- tRPab-min-tck
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- tRCD-min-tck
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- tWR-min-tck
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- tRASmin-min-tck
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- tCKESR-min-tck
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- tFAW-min-tck
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Child nodes:
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- The lpddr2 node may have one or more child nodes of type "lpddr2-timings".
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"lpddr2-timings" provides AC timing parameters of the device for
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a given speed-bin. The user may provide the timings for as many
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speed-bins as is required. Please see Documentation/devicetree/
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bindings/ddr/lpddr2-timings.txt for more information on "lpddr2-timings"
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Example:
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elpida_ECB240ABACN : lpddr2 {
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compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
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density = <2048>;
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io-width = <32>;
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tRPab-min-tck = <3>;
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tRCD-min-tck = <3>;
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tWR-min-tck = <3>;
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tRASmin-min-tck = <3>;
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tRRD-min-tck = <2>;
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tWTR-min-tck = <2>;
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tXP-min-tck = <2>;
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tRTP-min-tck = <2>;
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tCKE-min-tck = <3>;
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tCKESR-min-tck = <3>;
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tFAW-min-tck = <8>;
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timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
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compatible = "jedec,lpddr2-timings";
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min-freq = <10000000>;
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max-freq = <400000000>;
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tRPab = <21000>;
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tRCD = <18000>;
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tWR = <15000>;
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tRAS-min = <42000>;
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tRRD = <10000>;
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tWTR = <7500>;
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tXP = <7500>;
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tRTP = <7500>;
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tCKESR = <15000>;
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tDQSCK-max = <5500>;
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tFAW = <50000>;
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tZQCS = <90000>;
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tZQCL = <360000>;
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tZQinit = <1000000>;
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tRAS-max-ns = <70000>;
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};
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timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
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compatible = "jedec,lpddr2-timings";
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min-freq = <10000000>;
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max-freq = <200000000>;
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tRPab = <21000>;
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tRCD = <18000>;
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tWR = <15000>;
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tRAS-min = <42000>;
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tRRD = <10000>;
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tWTR = <10000>;
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tXP = <7500>;
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tRTP = <7500>;
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tCKESR = <15000>;
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tDQSCK-max = <5500>;
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tFAW = <50000>;
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tZQCS = <90000>;
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tZQCL = <360000>;
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tZQinit = <1000000>;
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tRAS-max-ns = <70000>;
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};
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}
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