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ARM: dts: rockchip: add rk3036 usb2phy nodes and enable them on kylin

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The rk3036 does contain a usb2phy, just until now it was just used
implicitly without additional configuration. As we now have the bits
in place for it getting actually controlled, add the necessary phy-node
to the GRF simple-mfd.

Enable the phy-ports in the same patch to not create bisectability
issues, as hooking up the phys to the usb controllers would create
probe deferrals until a board enables them. Doing everything in one
patch, solves that issue.

Only rk3036-kylin actually enabled the usb controllers, so is the only
board affected.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250503201512.991277-4-heiko@sntech.de
This commit is contained in:
Heiko Stuebner 2025-05-03 22:15:12 +02:00
parent c208997677
commit 9e010737dd
2 changed files with 47 additions and 0 deletions
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12
arch/arm/boot/dts/rockchip/rk3036-kylin.dts
View File

@ -388,6 +388,18 @@ &usb_otg {
status = "okay";
};
&usb2phy {
status = "okay";
};
&usb2phy_host {
status = "okay";
};
&usb2phy_otg {
status = "okay";
};
&vop {
status = "okay";
};

35
arch/arm/boot/dts/rockchip/rk3036.dtsi
View File

@ -213,6 +213,8 @@ usb_otg: usb@10180000 {
g-np-tx-fifo-size = <16>;
g-rx-fifo-size = <275>;
g-tx-fifo-size = <256 128 128 64 64 32>;
phys = <&usb2phy_otg>;
phy-names = "usb2-phy";
status = "disabled";
};
@ -224,6 +226,8 @@ usb_host: usb@101c0000 {
clocks = <&cru HCLK_OTG1>;
clock-names = "otg";
dr_mode = "host";
phys = <&usb2phy_host>;
phy-names = "usb2-phy";
status = "disabled";
};
@ -342,6 +346,37 @@ cru: clock-controller@20000000 {
grf: syscon@20008000 {
compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd";
reg = <0x20008000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
usb2phy: usb2phy@17c {
compatible = "rockchip,rk3036-usb2phy";
reg = <0x017c 0x20>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy";
assigned-clocks = <&cru SCLK_USB480M>;
assigned-clock-parents = <&usb2phy>;
#clock-cells = <0>;
status = "disabled";
usb2phy_host: host-port {
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "linestate";
#phy-cells = <0>;
status = "disabled";
};
usb2phy_otg: otg-port {
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "otg-bvalid", "otg-id",
"linestate";
#phy-cells = <0>;
status = "disabled";
};
};
power: power-controller {
compatible = "rockchip,rk3036-power-controller";