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PCI: dwc: Add dw_pcie_parent_bus_offset()

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Return the offset from CPU physical address to the parent bus address of
the specified element of the devicetree 'reg' property.

[bhelgaas: cpu_phy_addr -> cpu_phys_addr, return offset, split
.cpu_addr_fixup() checking and debug to separate patch]

Link: https://lore.kernel.org/r/20250315201548.858189-6-helgaas@kernel.org
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Frank Li 2025-03-15 15:15:40 -05:00 committed by Bjorn Helgaas
parent 2ce107e064
commit 9de3f3cd47
2 changed files with 26 additions and 0 deletions
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23
drivers/pci/controller/dwc/pcie-designware.c
View File

@ -16,6 +16,7 @@
#include <linux/gpio/consumer.h>
#include <linux/ioport.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/sizes.h>
#include <linux/types.h>
@ -1105,3 +1106,25 @@ void dw_pcie_setup(struct dw_pcie *pci)
dw_pcie_link_set_max_link_width(pci, pci->num_lanes);
}
resource_size_t dw_pcie_parent_bus_offset(struct dw_pcie *pci,
const char *reg_name,
resource_size_t cpu_phys_addr)
{
struct device *dev = pci->dev;
struct device_node *np = dev->of_node;
int index;
u64 reg_addr;
/* Look up reg_name address on parent bus */
index = of_property_match_string(np, "reg-names", reg_name);
if (index < 0) {
dev_err(dev, "No %s in devicetree \"reg\" property\n", reg_name);
return 0;
}
of_property_read_reg(np, index, &reg_addr, NULL);
return cpu_phys_addr - reg_addr;
}

3
drivers/pci/controller/dwc/pcie-designware.h
View File

@ -500,6 +500,9 @@ void dw_pcie_setup(struct dw_pcie *pci);
void dw_pcie_iatu_detect(struct dw_pcie *pci);
int dw_pcie_edma_detect(struct dw_pcie *pci);
void dw_pcie_edma_remove(struct dw_pcie *pci);
resource_size_t dw_pcie_parent_bus_offset(struct dw_pcie *pci,
const char *reg_name,
resource_size_t cpu_phy_addr);
static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val)
{