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clk: bd718x7: Support ROHM BD73800

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The ROHM BD73800 PMIC has a 32.768 kHz clock gate. Add support for
controlling this clock.

NOTE: The CLKOUT pin can be muxed by an OTP option. On some OTP
configurations the CLKOUT is not outputting the clk signal.

Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Link: https://patch.msgid.link/dfc72dbe7227d830040ae32c7f55cc18cf42f75d.1789538455.git.mazziesaccount@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
Matti Vaittinen 2026-09-16 09:11:42 +03:00 committed by Lee Jones
parent e2be915076
commit 9dd502dde3
1 changed files with 8 additions and 0 deletions
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8
drivers/clk/clk-bd718x7.c
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@ -21,6 +21,9 @@
#define BD718XX_REG_OUT32K 0x2E
/* BD72720 */
#define BD72720_REG_OUT32K 0x9a
/* BD73800 */
#define BD73800_REG_OUT32K 0x50
/*
* BD71837, BD71847, and BD71828 all use bit [0] to clk output control
*/
@ -123,6 +126,10 @@ static int bd71837_clk_probe(struct platform_device *pdev)
c->reg = BD72720_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD73800:
c->reg = BD73800_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
default:
dev_err(&pdev->dev, "Unknown clk chip\n");
return -EINVAL;
@ -152,6 +159,7 @@ static const struct platform_device_id bd718x7_clk_id[] = {
{ .name = "bd71828-clk", .driver_data = ROHM_CHIP_TYPE_BD71828 },
{ .name = "bd71815-clk", .driver_data = ROHM_CHIP_TYPE_BD71815 },
{ .name = "bd72720-clk", .driver_data = ROHM_CHIP_TYPE_BD72720 },
{ .name = "bd73800-clk", .driver_data = ROHM_CHIP_TYPE_BD73800 },
{ }
};
MODULE_DEVICE_TABLE(platform, bd718x7_clk_id);