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media: mediatek: vcodec: Add driver to support 10bit
Adding to support capture formats V4L2_PIX_FMT_MT2110T and V4L2_PIX_FMT_MT2110R for 10bit playback. Need to get the size of each plane again when user space setting syntax to get 10bit information. V4L2_PIX_FMT_MT2110T for AV1/VP9/HEVC. V4L2_PIX_FMT_MT2110R for H264. Signed-off-by: Mingjia Zhang <mingjia.zhang@mediatek.com> Co-developed-by: Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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@ -37,7 +37,9 @@ static bool mtk_vdec_get_cap_fmt(struct mtk_vcodec_dec_ctx *ctx, int format_inde
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{
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const struct mtk_vcodec_dec_pdata *dec_pdata = ctx->dev->vdec_pdata;
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const struct mtk_video_fmt *fmt;
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struct mtk_q_data *q_data;
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int num_frame_count = 0, i;
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bool ret = false;
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fmt = &dec_pdata->vdec_formats[format_index];
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for (i = 0; i < *dec_pdata->num_formats; i++) {
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@ -47,10 +49,26 @@ static bool mtk_vdec_get_cap_fmt(struct mtk_vcodec_dec_ctx *ctx, int format_inde
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num_frame_count++;
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}
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if (num_frame_count == 1 || fmt->fourcc == V4L2_PIX_FMT_MM21)
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if (num_frame_count == 1 || (!ctx->is_10bit_bitstream && fmt->fourcc == V4L2_PIX_FMT_MM21))
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return true;
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return false;
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q_data = &ctx->q_data[MTK_Q_DATA_SRC];
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switch (q_data->fmt->fourcc) {
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case V4L2_PIX_FMT_H264_SLICE:
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if (ctx->is_10bit_bitstream && fmt->fourcc == V4L2_PIX_FMT_MT2110R)
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ret = true;
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break;
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case V4L2_PIX_FMT_VP9_FRAME:
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case V4L2_PIX_FMT_AV1_FRAME:
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case V4L2_PIX_FMT_HEVC_SLICE:
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if (ctx->is_10bit_bitstream && fmt->fourcc == V4L2_PIX_FMT_MT2110T)
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ret = true;
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break;
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default:
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break;
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}
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return ret;
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}
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static struct mtk_q_data *mtk_vdec_get_q_data(struct mtk_vcodec_dec_ctx *ctx,
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@ -31,6 +31,7 @@ enum mtk_vdec_format_types {
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MTK_VDEC_FORMAT_AV1_FRAME = 0x800,
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MTK_VDEC_FORMAT_HEVC_FRAME = 0x1000,
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MTK_VCODEC_INNER_RACING = 0x20000,
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MTK_VDEC_IS_SUPPORT_10BIT = 0x40000,
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};
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/*
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@ -160,6 +161,8 @@ struct mtk_vcodec_dec_pdata {
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* @hw_id: hardware index used to identify different hardware.
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*
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* @msg_queue: msg queue used to store lat buffer information.
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*
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* @is_10bit_bitstream: set to true if it's 10bit bitstream
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*/
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struct mtk_vcodec_dec_ctx {
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enum mtk_instance_type type;
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@ -202,6 +205,8 @@ struct mtk_vcodec_dec_ctx {
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int hw_id;
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struct vdec_msg_queue msg_queue;
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bool is_10bit_bitstream;
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};
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/**
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@ -200,7 +200,7 @@ static const struct mtk_stateless_control mtk_stateless_controls[] = {
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#define NUM_CTRLS ARRAY_SIZE(mtk_stateless_controls)
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static struct mtk_video_fmt mtk_video_formats[7];
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static struct mtk_video_fmt mtk_video_formats[9];
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static struct mtk_video_fmt default_out_format;
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static struct mtk_video_fmt default_cap_format;
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@ -387,6 +387,138 @@ static int mtk_vdec_flush_decoder(struct mtk_vcodec_dec_ctx *ctx)
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return vdec_if_decode(ctx, NULL, NULL, &res_chg);
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}
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static int mtk_vcodec_get_pic_info(struct mtk_vcodec_dec_ctx *ctx)
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{
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struct mtk_q_data *q_data;
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int ret = 0;
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q_data = &ctx->q_data[MTK_Q_DATA_DST];
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if (q_data->fmt->num_planes == 1) {
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mtk_v4l2_vdec_err(ctx, "[%d]Error!! 10bit mode not support one plane", ctx->id);
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return -EINVAL;
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}
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ctx->capture_fourcc = q_data->fmt->fourcc;
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ret = vdec_if_get_param(ctx, GET_PARAM_PIC_INFO, &ctx->picinfo);
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if (ret) {
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mtk_v4l2_vdec_err(ctx, "[%d]Error!! Get GET_PARAM_PICTURE_INFO Fail", ctx->id);
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return ret;
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}
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ctx->last_decoded_picinfo = ctx->picinfo;
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q_data->sizeimage[0] = ctx->picinfo.fb_sz[0];
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q_data->bytesperline[0] = ctx->picinfo.buf_w * 5 / 4;
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q_data->sizeimage[1] = ctx->picinfo.fb_sz[1];
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q_data->bytesperline[1] = ctx->picinfo.buf_w * 5 / 4;
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q_data->coded_width = ctx->picinfo.buf_w;
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q_data->coded_height = ctx->picinfo.buf_h;
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mtk_v4l2_vdec_dbg(1, ctx, "[%d] wxh=%dx%d pic wxh=%dx%d sz[0]=0x%x sz[1]=0x%x",
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ctx->id, ctx->picinfo.buf_w, ctx->picinfo.buf_h,
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ctx->picinfo.pic_w, ctx->picinfo.pic_h,
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q_data->sizeimage[0], q_data->sizeimage[1]);
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return ret;
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}
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static int mtk_vdec_s_ctrl(struct v4l2_ctrl *ctrl)
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{
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struct mtk_vcodec_dec_ctx *ctx = ctrl_to_dec_ctx(ctrl);
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struct v4l2_ctrl_h264_sps *h264;
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struct v4l2_ctrl_hevc_sps *h265;
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struct v4l2_ctrl_vp9_frame *frame;
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struct v4l2_ctrl_av1_sequence *seq;
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struct v4l2_ctrl *hdr_ctrl;
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const struct mtk_vcodec_dec_pdata *dec_pdata = ctx->dev->vdec_pdata;
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const struct mtk_video_fmt *fmt;
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int i = 0, ret = 0;
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hdr_ctrl = ctrl;
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if (!hdr_ctrl || !hdr_ctrl->p_new.p)
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return -EINVAL;
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switch (hdr_ctrl->id) {
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case V4L2_CID_STATELESS_H264_SPS:
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h264 = (struct v4l2_ctrl_h264_sps *)hdr_ctrl->p_new.p;
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if (h264->bit_depth_chroma_minus8 == 2 && h264->bit_depth_luma_minus8 == 2) {
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ctx->is_10bit_bitstream = true;
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} else if (h264->bit_depth_chroma_minus8 != 0 &&
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h264->bit_depth_luma_minus8 != 0) {
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mtk_v4l2_vdec_err(ctx, "H264: chroma_minus8:%d, luma_minus8:%d",
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h264->bit_depth_chroma_minus8,
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h264->bit_depth_luma_minus8);
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return -EINVAL;
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}
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break;
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case V4L2_CID_STATELESS_HEVC_SPS:
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h265 = (struct v4l2_ctrl_hevc_sps *)hdr_ctrl->p_new.p;
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if (h265->bit_depth_chroma_minus8 == 2 && h265->bit_depth_luma_minus8 == 2) {
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ctx->is_10bit_bitstream = true;
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} else if (h265->bit_depth_chroma_minus8 != 0 &&
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h265->bit_depth_luma_minus8 != 0) {
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mtk_v4l2_vdec_err(ctx, "HEVC: chroma_minus8:%d, luma_minus8:%d",
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h265->bit_depth_chroma_minus8,
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h265->bit_depth_luma_minus8);
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return -EINVAL;
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}
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break;
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case V4L2_CID_STATELESS_VP9_FRAME:
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frame = (struct v4l2_ctrl_vp9_frame *)hdr_ctrl->p_new.p;
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if (frame->bit_depth == 10) {
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ctx->is_10bit_bitstream = true;
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} else if (frame->bit_depth != 8) {
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mtk_v4l2_vdec_err(ctx, "VP9: bit_depth:%d", frame->bit_depth);
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return -EINVAL;
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}
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break;
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case V4L2_CID_STATELESS_AV1_SEQUENCE:
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seq = (struct v4l2_ctrl_av1_sequence *)hdr_ctrl->p_new.p;
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if (seq->bit_depth == 10) {
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ctx->is_10bit_bitstream = true;
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} else if (seq->bit_depth != 8) {
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mtk_v4l2_vdec_err(ctx, "AV1: bit_depth:%d", seq->bit_depth);
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return -EINVAL;
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}
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break;
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default:
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mtk_v4l2_vdec_dbg(3, ctx, "Not supported to set ctrl id: 0x%x\n", hdr_ctrl->id);
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return ret;
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}
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if (!ctx->is_10bit_bitstream)
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return ret;
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for (i = 0; i < *dec_pdata->num_formats; i++) {
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fmt = &dec_pdata->vdec_formats[i];
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if (fmt->fourcc == V4L2_PIX_FMT_MT2110R &&
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hdr_ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
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ctx->q_data[MTK_Q_DATA_DST].fmt = fmt;
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break;
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}
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if (fmt->fourcc == V4L2_PIX_FMT_MT2110T &&
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(hdr_ctrl->id == V4L2_CID_STATELESS_HEVC_SPS ||
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hdr_ctrl->id == V4L2_CID_STATELESS_VP9_FRAME ||
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hdr_ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE)) {
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ctx->q_data[MTK_Q_DATA_DST].fmt = fmt;
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break;
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}
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}
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ret = mtk_vcodec_get_pic_info(ctx);
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return ret;
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}
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static const struct v4l2_ctrl_ops mtk_vcodec_dec_ctrl_ops = {
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.s_ctrl = mtk_vdec_s_ctrl,
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};
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static int mtk_vcodec_dec_ctrls_setup(struct mtk_vcodec_dec_ctx *ctx)
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{
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unsigned int i;
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@ -399,7 +531,7 @@ static int mtk_vcodec_dec_ctrls_setup(struct mtk_vcodec_dec_ctx *ctx)
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for (i = 0; i < NUM_CTRLS; i++) {
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struct v4l2_ctrl_config cfg = mtk_stateless_controls[i].cfg;
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cfg.ops = &mtk_vcodec_dec_ctrl_ops;
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v4l2_ctrl_new_custom(&ctx->ctrl_hdl, &cfg, NULL);
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if (ctx->ctrl_hdl.error) {
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mtk_v4l2_vdec_err(ctx, "Adding control %d failed %d", i,
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@ -466,6 +598,8 @@ static void mtk_vcodec_add_formats(unsigned int fourcc,
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break;
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case V4L2_PIX_FMT_MM21:
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case V4L2_PIX_FMT_MT21C:
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case V4L2_PIX_FMT_MT2110T:
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case V4L2_PIX_FMT_MT2110R:
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mtk_video_formats[count_formats].fourcc = fourcc;
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mtk_video_formats[count_formats].type = MTK_FMT_FRAME;
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mtk_video_formats[count_formats].num_planes = 2;
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@ -491,6 +625,12 @@ static void mtk_vcodec_get_supported_formats(struct mtk_vcodec_dec_ctx *ctx)
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mtk_vcodec_add_formats(V4L2_PIX_FMT_MT21C, ctx);
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cap_format_count++;
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}
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if (ctx->dev->dec_capability & MTK_VDEC_IS_SUPPORT_10BIT) {
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mtk_vcodec_add_formats(V4L2_PIX_FMT_MT2110T, ctx);
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cap_format_count++;
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mtk_vcodec_add_formats(V4L2_PIX_FMT_MT2110R, ctx);
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cap_format_count++;
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}
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if (ctx->dev->dec_capability & MTK_VDEC_FORMAT_MM21) {
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mtk_vcodec_add_formats(V4L2_PIX_FMT_MM21, ctx);
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cap_format_count++;
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