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drm/xe: Move GSI offset adjustment fields into 'struct xe_mmio'
By moving the GSI adjustment fields into 'struct xe_mmio' we can replace the GT's MMIO substructure with another instance of xe_mmio. At the moment this means MMIO operations wind up pulling information from two different places (the tile's xe_mmio for the iomap and the GT's xe_mmio for the adjustment), but we'll address that in future patches. The type headers change a bit with this change, meaning that various files should be including xe_device_types.h instead of (or in addition to) xe_gt_types.h. v2: - Fix pre-existing kerneldoc typo while moving the fields (Lucas) v3: - Add missing '@' in kerneldoc. (Rodrigo) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-49-matthew.d.roper@intel.com
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@ -10,7 +10,7 @@
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#include <drm/drm_print.h>
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#include "xe_device_types.h"
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#include "xe_gt_types.h"
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#include "xe_step.h"
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/**
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@ -9,6 +9,7 @@
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#include <drm/drm_util.h>
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#include "xe_device_types.h"
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#include "xe_gt_types.h"
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static inline struct xe_device *to_xe_device(const struct drm_device *dev)
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{
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@ -14,7 +14,6 @@
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#include "xe_devcoredump_types.h"
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#include "xe_heci_gsc.h"
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#include "xe_gt_types.h"
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#include "xe_lmtt_types.h"
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#include "xe_memirq_types.h"
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#include "xe_oa.h"
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@ -127,6 +126,12 @@ struct xe_mmio {
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* non-register regions such as the GGTT PTEs.
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*/
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size_t regs_size;
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/** @adj_limit: adjust MMIO address if address is below this value */
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u32 adj_limit;
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/** @adj_offset: offset to add to MMIO address when adjusting */
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u32 adj_offset;
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};
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/**
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@ -11,9 +11,9 @@
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#include <drm/drm_managed.h>
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#include <drm/drm_print.h>
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#include "xe_device_types.h"
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#include "xe_gt_sysfs.h"
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#include "xe_gt_throttle.h"
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#include "xe_gt_types.h"
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#include "xe_guc_pc.h"
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#include "xe_pm.h"
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@ -8,7 +8,7 @@
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#include <drm/drm_print.h>
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#include "xe_device_types.h"
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#include "xe_gt_types.h"
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#define xe_gt_printk(_gt, _level, _fmt, ...) \
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drm_##_level(>_to_xe(_gt)->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
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@ -6,6 +6,7 @@
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#ifndef _XE_GT_TYPES_H_
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#define _XE_GT_TYPES_H_
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#include "xe_device_types.h"
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#include "xe_force_wake_types.h"
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#include "xe_gt_idle_types.h"
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#include "xe_gt_sriov_pf_types.h"
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@ -147,15 +148,7 @@ struct xe_gt {
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* register space, but have their own copy of GSI registers at a
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* specific offset.
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*/
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struct {
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/**
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* @mmio.adj_limit: adjust MMIO address if address is below this
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* value
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*/
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u32 adj_limit;
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/** @mmio.adj_offset: offect to add to MMIO address when adjusting */
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u32 adj_offset;
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} mmio;
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struct xe_mmio mmio;
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/**
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* @pm: power management info for GT. The driver uses the GT's
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