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phy: rockchip: samsung-hdptx: Add high color depth management

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Add support for 8-bit, 10-bit, 12-bit and 16-bit color depth setup.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Dmitry Baryshkov <dmtiry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250318-phy-sam-hdptx-bpc-v6-14-8cb1678e7663@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Cristian Ciocaltea 2025-03-18 14:35:48 +02:00 committed by Vinod Koul
parent 45b14bdcf4
commit 9d0ec51d7c
1 changed files with 22 additions and 1 deletions
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23
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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@ -1028,6 +1028,9 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx)
regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_POSTDIV_SEL_MASK, regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_POSTDIV_SEL_MASK,
FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv)); FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv));
regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_SEL_MASK,
FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->hdmi_cfg.bpc - 8) >> 1));
regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK, regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK,
FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1)); FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1));
@ -1427,7 +1430,8 @@ static int rk_hdptx_phy_power_on(struct phy *phy)
hdptx->hdmi_cfg.tmds_char_rate *= 100; hdptx->hdmi_cfg.tmds_char_rate *= 100;
} }
dev_dbg(hdptx->dev, "%s rate=%llu\n", __func__, hdptx->hdmi_cfg.tmds_char_rate); dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__,
hdptx->hdmi_cfg.tmds_char_rate, hdptx->hdmi_cfg.bpc);
} }
ret = rk_hdptx_phy_consumer_get(hdptx); ret = rk_hdptx_phy_consumer_get(hdptx);
@ -1492,6 +1496,19 @@ static int rk_hdptx_phy_verify_hdmi_config(struct rk_hdptx_phy *hdptx,
!rk_hdptx_phy_clk_pll_calc(hdmi->tmds_char_rate, NULL)) !rk_hdptx_phy_clk_pll_calc(hdmi->tmds_char_rate, NULL))
return -EINVAL; return -EINVAL;
if (!hdmi->bpc)
hdmi->bpc = 8;
switch (hdmi->bpc) {
case 8:
case 10:
case 12:
case 16:
break;
default:
return -EINVAL;
};
return 0; return 0;
} }
@ -1764,6 +1781,9 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt
hdptx->hdmi_cfg = opts->hdmi; hdptx->hdmi_cfg = opts->hdmi;
hdptx->restrict_rate_change = true; hdptx->restrict_rate_change = true;
} }
dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__,
hdptx->hdmi_cfg.tmds_char_rate, hdptx->hdmi_cfg.bpc);
return ret; return ret;
} }
@ -1972,6 +1992,7 @@ static int rk_hdptx_phy_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
hdptx->dev = dev; hdptx->dev = dev;
hdptx->hdmi_cfg.bpc = 8;
regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
if (IS_ERR(regs)) if (IS_ERR(regs))