From 8e56017a0d268d1bfeac94e0af6a6ba3f8677e42 Mon Sep 17 00:00:00 2001 From: Naina Mehta Date: Wed, 10 Feb 2021 12:08:48 +0530 Subject: [PATCH 1/4] soc: qcom: Add a tlmm VM irqchip Add a VM tlmm irqchip, to all dummy irq chip parent for pinctrl driver for VMs. Change-Id: I230c5e0a95a37bbcab4a03282e1660392085cce9 Signed-off-by: Naina Mehta Signed-off-by: Murali Nalajala Signed-off-by: Peng Yang --- drivers/soc/qcom/Kconfig | 8 +++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qcom_tlmm_vm_irqchip.c | 94 +++++++++++++++++++++++++ 3 files changed, 103 insertions(+) create mode 100644 drivers/soc/qcom/qcom_tlmm_vm_irqchip.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index a8c43ca4a6d7..9c56b0c10870 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -107,6 +107,14 @@ config QTI_CPUCP_LOG This driver register with IPC_Logging framework, to have dedicated buffer for cpucp hw device. +config QCOM_TLMM_VM_IRQCHIP + tristate "Qualcomm Technologies, Inc. TLMM VM irqchip driver" + help + Qualcomm Technologies, Inc. TLMM VM irqchip driver for MSM devices. The + driver acts as a parent interrupt controller for tlmm driver for VMs. + Say Y here to compile the driver as a part of kernel or M to compile + as a module. + config QCOM_LLCC tristate "Qualcomm Technologies, Inc. LLCC driver" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index c324f0d4e817..8fab0d12f8c9 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_QCOM_WDT_CORE) += qcom_wdt_core.o obj-$(CONFIG_QCOM_SOC_WATCHDOG) += qcom_soc_wdt.o obj-$(CONFIG_QCOM_STATS) += qcom_stats.o obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o +obj-$(CONFIG_QCOM_TLMM_VM_IRQCHIP) += qcom_tlmm_vm_irqchip.o obj-$(CONFIG_QCOM_APR) += apr.o obj-$(CONFIG_QCOM_EUD) += eud.o obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o diff --git a/drivers/soc/qcom/qcom_tlmm_vm_irqchip.c b/drivers/soc/qcom/qcom_tlmm_vm_irqchip.c new file mode 100644 index 000000000000..420217f18dbb --- /dev/null +++ b/drivers/soc/qcom/qcom_tlmm_vm_irqchip.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define TLMM_VM_NUM_IRQ 10 + +struct qcom_tlmm_vm_irqchip_data { + struct irq_domain *domain; +}; + +static struct qcom_tlmm_vm_irqchip_data qcom_tlmm_vm_irqchip_data __read_mostly; +/* + * Set simple handler and mark IRQ as valid. Nothing interesting to do here + * since we are using a dummy interrupt chip. + */ +static int qcom_tlmm_vm_irqchip_domain(struct irq_domain *domain, + unsigned int irq, irq_hw_number_t hwirq) +{ + irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq); + + return 0; +} + +static const struct irq_domain_ops qcom_tlmm_vm_irqchip_domain_ops = { + .map = qcom_tlmm_vm_irqchip_domain, +}; + +static int qcom_tlmm_vm_irqchip_probe(struct platform_device *pdev) +{ + + qcom_tlmm_vm_irqchip_data.domain = irq_domain_add_linear(pdev->dev.of_node, TLMM_VM_NUM_IRQ, + &qcom_tlmm_vm_irqchip_domain_ops, + NULL); + if (!qcom_tlmm_vm_irqchip_data.domain) + return -ENOMEM; + + qcom_tlmm_vm_irqchip_data.domain->name = "qcom-tlmm-vm-irq-domain"; + + pr_info("qcom tlmm vm irq controller registered\n"); + + return 0; +} + +static int qcom_tlmm_vm_irqchip_remove(struct platform_device *pdev) +{ + irq_domain_remove(qcom_tlmm_vm_irqchip_data.domain); + + return 0; +} + +static const struct of_device_id qcom_tlmm_vm_irqchip_of_match[] = { + { .compatible = "qcom,tlmm-vm-irq"}, + {} +}; +MODULE_DEVICE_TABLE(of, qcom_tlmm_vm_irqchip_of_match); + +static struct platform_driver qcom_tlmm_vm_irqchip_driver = { + .probe = qcom_tlmm_vm_irqchip_probe, + .remove = qcom_tlmm_vm_irqchip_remove, + .driver = { + .name = "qcom_tlmm_vm_irqchip", + .of_match_table = qcom_tlmm_vm_irqchip_of_match, + }, +}; + +static int __init qcom_tlmm_vm_irqchip_init(void) +{ + int ret; + + ret = platform_driver_register(&qcom_tlmm_vm_irqchip_driver); + if (ret) + pr_err("%s: qcom_tlmm_vm_irqchip register failed %d\n", __func__, ret); + return ret; +} +arch_initcall(qcom_tlmm_vm_irqchip_init); + +static __exit void qcom_tlmm_vm_irqchip_exit(void) +{ + platform_driver_unregister(&qcom_tlmm_vm_irqchip_driver); +} +module_exit(qcom_tlmm_vm_irqchip_exit); + +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. TLMM VM Irqchip Driver"); +MODULE_LICENSE("GPL"); From e831cebf5b80ffa9b3eeaaebf38b3e547666ae6e Mon Sep 17 00:00:00 2001 From: Ashish Bhimanpalliwar Date: Thu, 18 Nov 2021 10:26:00 +0530 Subject: [PATCH 2/4] defconfig: Enable a tlmm VM irqchip Enable a VM tlmm irqchip, to all dummy irq chip parent for pinctrl driver for VMs. Change-Id: Id86fb3ca8677c5c51a186b452b9a3904cc7ef00e Signed-off-by: Ashish Bhimanpalliwar --- arch/arm64/configs/vendor/pineapple_tuivm.config | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/vendor/pineapple_tuivm.config b/arch/arm64/configs/vendor/pineapple_tuivm.config index a21f0b33a7c5..fd55cf5e9aea 100644 --- a/arch/arm64/configs/vendor/pineapple_tuivm.config +++ b/arch/arm64/configs/vendor/pineapple_tuivm.config @@ -29,6 +29,7 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_MSM=y CONFIG_PROC_CHILDREN=y CONFIG_QCOM_SCM=y +CONFIG_QCOM_TLMM_VM_IRQCHIP=y CONFIG_TMPFS_XATTR=y CONFIG_USER_NS=y CONFIG_VIRT_DRIVERS=y From 9b38ca2258253c5aef96cb36b936a4f3c8a8d1ea Mon Sep 17 00:00:00 2001 From: Peng Yang Date: Mon, 10 Oct 2022 23:42:42 -0700 Subject: [PATCH 3/4] pinctrl: qcom: Add pineapple vm pinctrl support Add pineapple vm pinctrl support. Change-Id: I1fcf3866f99d376c8512f22a090d7ce83d17e237 Signed-off-by: Peng Yang --- drivers/pinctrl/qcom/pinctrl-pineapple.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-pineapple.c b/drivers/pinctrl/qcom/pinctrl-pineapple.c index a92530af84ec..7da74575eb4d 100644 --- a/drivers/pinctrl/qcom/pinctrl-pineapple.c +++ b/drivers/pinctrl/qcom/pinctrl-pineapple.c @@ -5,6 +5,7 @@ #include #include +#include #include #include @@ -2420,11 +2421,18 @@ static const struct msm_pinctrl_soc_data pineapple_vm_pinctrl = { static int pineapple_pinctrl_probe(struct platform_device *pdev) { - return msm_pinctrl_probe(pdev, &pineapple_pinctrl); + const struct msm_pinctrl_soc_data *pinctrl_data; + struct device *dev = &pdev->dev; + + pinctrl_data = of_device_get_match_data(dev); + if (!pinctrl_data) + return -EINVAL; + + return msm_pinctrl_probe(pdev, pinctrl_data); } static const struct of_device_id pineapple_pinctrl_of_match[] = { - { .compatible = "qcom,pineapple-pinctrl", }, + { .compatible = "qcom,pineapple-pinctrl", .data = &pineapple_pinctrl}, { .compatible = "qcom,pineapple-vm-pinctrl", .data = &pineapple_vm_pinctrl}, { }, }; @@ -2453,3 +2461,4 @@ module_exit(pineapple_pinctrl_exit); MODULE_DESCRIPTION("QTI pineapple pinctrl driver"); MODULE_LICENSE("GPL v2"); MODULE_DEVICE_TABLE(of, pineapple_pinctrl_of_match); +MODULE_SOFTDEP("pre: qcom_tlmm_vm_irqchip"); From 7cb70c1665c3c120365c17296fd8dfd56dff03df Mon Sep 17 00:00:00 2001 From: Ashish Bhimanpalliwar Date: Thu, 18 Nov 2021 11:23:45 +0530 Subject: [PATCH 4/4] defconfig: Enable pineapple vm pinctrl Enable pineapple vm pinctrl. Change-Id: Idc70cab620d9c01d184a0acd1cec3f4ed58ff2f9 Signed-off-by: Ashish Bhimanpalliwar Signed-off-by: Peng Yang --- arch/arm64/configs/vendor/pineapple_tuivm.config | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/vendor/pineapple_tuivm.config b/arch/arm64/configs/vendor/pineapple_tuivm.config index fd55cf5e9aea..0a6fb43aecb9 100644 --- a/arch/arm64/configs/vendor/pineapple_tuivm.config +++ b/arch/arm64/configs/vendor/pineapple_tuivm.config @@ -27,6 +27,7 @@ CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" CONFIG_PID_NS=y CONFIG_PINCONF=y CONFIG_PINCTRL_MSM=y +CONFIG_PINCTRL_PINEAPPLE=y CONFIG_PROC_CHILDREN=y CONFIG_QCOM_SCM=y CONFIG_QCOM_TLMM_VM_IRQCHIP=y