ARM: tegra: Fix nvidia,io-reset properties

Rename the unknown nvidia,ioreset property to nvidia,io-reset, as
specified in the DT bindings and supported by the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2022-11-04 13:21:08 +01:00
parent a77d8806aa
commit 9cd84b279e
2 changed files with 8 additions and 8 deletions

View File

@ -168,7 +168,7 @@ vi_d8_pl6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
/* SDMMC3 pinmux */
@ -711,7 +711,7 @@ vi_pclk_pt0 {
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
/* GPIO keys pinmux */
@ -805,7 +805,7 @@ vi_vsync_pd6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_d10_pt2 {
@ -937,7 +937,7 @@ vi_d6_pl4 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_mclk_pt1 {

View File

@ -134,7 +134,7 @@ vi_d8_pl6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
/* SDMMC3 pinmux */
@ -622,7 +622,7 @@ vi_pclk_pt0 {
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
pu1 {
@ -689,7 +689,7 @@ vi_vsync_pd6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_d10_pt2 {
@ -864,7 +864,7 @@ vi_d6_pl4 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_mclk_pt1 {