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pinctrl: renesas: r8a73a4: Optimize fixed-width reserved fields

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Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 126 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f835c2ff5bb07e541f6377b16f0a32c5aad2a47f.1649865241.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2022-04-13 19:23:45 +02:00
parent 0479e084f7
commit 9cad77c5c8
1 changed files with 16 additions and 42 deletions
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58
drivers/pinctrl/renesas/pfc-r8a73a4.c
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@ -2270,15 +2270,17 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MSEL1CR_00_0, MSEL1CR_00_1,
))
},
{ PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1, GROUP(
{ PINMUX_CFG_REG_VAR("MSEL3CR", 0xe6058020, 32,
GROUP(1, -2, 1, 1, 1, -2, 1, 1, 1, 1, 1, 1,
1, 1, 1, -2, 1, 1, 1, 1, -2, 1, -2, 1,
-1, 1, 1),
GROUP(
MSEL3CR_31_0, MSEL3CR_31_1,
0, 0,
0, 0,
/* RESERVED [2] */
MSEL3CR_28_0, MSEL3CR_28_1,
MSEL3CR_27_0, MSEL3CR_27_1,
MSEL3CR_26_0, MSEL3CR_26_1,
0, 0,
0, 0,
/* RESERVED [2] */
MSEL3CR_23_0, MSEL3CR_23_1,
MSEL3CR_22_0, MSEL3CR_22_1,
MSEL3CR_21_0, MSEL3CR_21_1,
@ -2288,19 +2290,16 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MSEL3CR_17_0, MSEL3CR_17_1,
MSEL3CR_16_0, MSEL3CR_16_1,
MSEL3CR_15_0, MSEL3CR_15_1,
0, 0,
0, 0,
/* RESERVED [2] */
MSEL3CR_12_0, MSEL3CR_12_1,
MSEL3CR_11_0, MSEL3CR_11_1,
MSEL3CR_10_0, MSEL3CR_10_1,
MSEL3CR_09_0, MSEL3CR_09_1,
0, 0,
0, 0,
/* RESERVED [2] */
MSEL3CR_06_0, MSEL3CR_06_1,
0, 0,
0, 0,
/* RESERVED [2] */
MSEL3CR_03_0, MSEL3CR_03_1,
0, 0,
/* RESERVED [1] */
MSEL3CR_01_0, MSEL3CR_01_1,
MSEL3CR_00_0, MSEL3CR_00_1,
))
@ -2375,37 +2374,12 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0, 0,
))
},
{ PINMUX_CFG_REG("MSEL8CR", 0xe6058034, 32, 1, GROUP(
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
{ PINMUX_CFG_REG_VAR("MSEL8CR", 0xe6058034, 32,
GROUP(-15, 1, -14, 1, 1),
GROUP(
/* RESERVED [15] */
MSEL8CR_16_0, MSEL8CR_16_1,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
0, 0,
/* RESERVED [14] */
MSEL8CR_01_0, MSEL8CR_01_1,
MSEL8CR_00_0, MSEL8CR_00_1,
))