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drm/amd: fix dcn 2.01 check
The ASICREV_IS_BEIGE_GOBY_P check always took precedence, because it includes all chip revisions upto NV_UNKNOWN.
Fixes: 54b822b3ea ("drm/amd/display: Use dce_version instead of chip_id")
Signed-off-by: Andy Nguyen <theofficialflow1996@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9c7be0efa6
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@ -244,6 +244,10 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
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BREAK_TO_DEBUGGER();
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return NULL;
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}
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if (ctx->dce_version == DCN_VERSION_2_01) {
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dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
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return &clk_mgr->base;
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}
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if (ASICREV_IS_SIENNA_CICHLID_P(asic_id.hw_internal_rev)) {
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dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
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return &clk_mgr->base;
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@ -256,10 +260,6 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
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dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
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return &clk_mgr->base;
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}
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if (ctx->dce_version == DCN_VERSION_2_01) {
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dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
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return &clk_mgr->base;
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}
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dcn20_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
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return &clk_mgr->base;
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}
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