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Merge branch 'net-dsa-mv88e6xxx-remove-redundant-ptp-timestamping-code'
Russell King says: ==================== net: dsa: mv88e6xxx: remove redundant ptp/timestamping code mv88e6xxx as accumulated some unused data structures and code over the years. This series removes it and simplifies the code. See the patches for each change. ==================== Link: https://patch.msgid.link/aMKoYyN18FHFCa1q@shell.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
9c0d0fa8d4
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@ -5088,7 +5088,7 @@ static const struct mv88e6xxx_ops mv88e6250_ops = {
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.vtu_getnext = mv88e6185_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
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.avb_ops = &mv88e6352_avb_ops,
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.ptp_ops = &mv88e6250_ptp_ops,
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.ptp_ops = &mv88e6352_ptp_ops,
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.phylink_get_caps = mv88e6250_phylink_get_caps,
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.set_max_frame_size = mv88e6185_g1_set_max_frame_size,
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};
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@ -424,8 +424,6 @@ struct mv88e6xxx_chip {
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struct ptp_clock_info ptp_clock_info;
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struct delayed_work tai_event_work;
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struct ptp_pin_desc pin_config[MV88E6XXX_MAX_GPIO];
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u16 trig_config;
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u16 evcap_config;
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u16 enable_count;
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/* Current ingress and egress monitor ports */
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@ -167,42 +167,26 @@ static u64 mv88e6165_ptp_clock_read(struct cyclecounter *cc)
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}
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/* mv88e6352_config_eventcap - configure TAI event capture
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* @event: PTP_CLOCK_PPS (internal) or PTP_CLOCK_EXTTS (external)
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* @rising: zero for falling-edge trigger, else rising-edge trigger
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*
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* This will also reset the capture sequence counter.
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*/
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static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int event,
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int rising)
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static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int rising)
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{
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u16 global_config;
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u16 cap_config;
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u16 evcap_config;
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int err;
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chip->evcap_config = MV88E6XXX_TAI_CFG_CAP_OVERWRITE |
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MV88E6XXX_TAI_CFG_CAP_CTR_START;
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evcap_config = MV88E6XXX_TAI_CFG_CAP_OVERWRITE |
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MV88E6XXX_TAI_CFG_CAP_CTR_START;
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if (!rising)
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chip->evcap_config |= MV88E6XXX_TAI_CFG_EVREQ_FALLING;
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evcap_config |= MV88E6XXX_TAI_CFG_EVREQ_FALLING;
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global_config = (chip->evcap_config | chip->trig_config);
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err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_CFG, global_config);
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err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_CFG, evcap_config);
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if (err)
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return err;
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if (event == PTP_CLOCK_PPS) {
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cap_config = MV88E6XXX_TAI_EVENT_STATUS_CAP_TRIG;
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} else if (event == PTP_CLOCK_EXTTS) {
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/* if STATUS_CAP_TRIG is unset we capture PTP_EVREQ events */
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cap_config = 0;
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} else {
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return -EINVAL;
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}
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/* Write the capture config; this also clears the capture counter */
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err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_EVENT_STATUS,
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cap_config);
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return err;
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return mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_EVENT_STATUS, 0);
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}
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static void mv88e6352_tai_event_work(struct work_struct *ugly)
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@ -355,7 +339,7 @@ static int mv88e6352_ptp_enable_extts(struct mv88e6xxx_chip *chip,
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schedule_delayed_work(&chip->tai_event_work,
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TAI_EVENT_WORK_INTERVAL);
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err = mv88e6352_config_eventcap(chip, PTP_CLOCK_EXTTS, rising);
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err = mv88e6352_config_eventcap(chip, rising);
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} else {
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func = MV88E6352_G2_SCRATCH_GPIO_PCTL_GPIO;
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@ -413,29 +397,6 @@ const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {
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(1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),
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};
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const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops = {
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.clock_read = mv88e6352_ptp_clock_read,
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.ptp_enable = mv88e6352_ptp_enable,
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.ptp_verify = mv88e6352_ptp_verify,
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.event_work = mv88e6352_tai_event_work,
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.port_enable = mv88e6352_hwtstamp_port_enable,
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.port_disable = mv88e6352_hwtstamp_port_disable,
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.n_ext_ts = 1,
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.arr0_sts_reg = MV88E6XXX_PORT_PTP_ARR0_STS,
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.arr1_sts_reg = MV88E6XXX_PORT_PTP_ARR1_STS,
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.dep_sts_reg = MV88E6XXX_PORT_PTP_DEP_STS,
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.rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
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(1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),
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};
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const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {
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.clock_read = mv88e6352_ptp_clock_read,
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.ptp_enable = mv88e6352_ptp_enable,
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@ -54,7 +54,6 @@
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/* Offset 0x09: Event Status */
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#define MV88E6XXX_TAI_EVENT_STATUS 0x09
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#define MV88E6XXX_TAI_EVENT_STATUS_CAP_TRIG 0x4000
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#define MV88E6XXX_TAI_EVENT_STATUS_ERROR 0x0200
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#define MV88E6XXX_TAI_EVENT_STATUS_VALID 0x0100
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#define MV88E6XXX_TAI_EVENT_STATUS_CTR_MASK 0x00ff
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@ -149,7 +148,6 @@ void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);
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ptp_clock_info)
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extern const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops;
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extern const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops;
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extern const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops;
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extern const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops;
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@ -170,7 +168,6 @@ static inline void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)
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}
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static const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {};
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static const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops = {};
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static const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {};
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static const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = {};
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