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arm64: dts: s32g: add the eDMA nodes

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Add the two eDMA nodes in the device tree in order to enable the probing
of the S32G2/S32G3 eDMA driver.

Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Larisa Grigore 2025-02-03 10:09:19 +02:00 committed by Shawn Guo
parent 1ecc4dbf6a
commit 9bf72db233
2 changed files with 68 additions and 0 deletions
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34
arch/arm64/boot/dts/freescale/s32g2.dtsi
View File

@ -317,6 +317,23 @@ usdhc0-200mhz-grp4 {
};
};
edma0: dma-controller@40144000 {
compatible = "nxp,s32g2-edma";
reg = <0x40144000 0x24000>,
<0x4012c000 0x3000>,
<0x40130000 0x3000>;
#dma-cells = <2>;
dma-channels = <32>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx-0-15",
"tx-16-31",
"err";
clocks = <&clks 63>, <&clks 64>;
clock-names = "dmamux0", "dmamux1";
};
uart0: serial@401c8000 {
compatible = "nxp,s32g2-linflexuart",
"fsl,s32v234-linflexuart";
@ -366,6 +383,23 @@ i2c2: i2c@401ec000 {
status = "disabled";
};
edma1: dma-controller@40244000 {
compatible = "nxp,s32g2-edma";
reg = <0x40244000 0x24000>,
<0x4022c000 0x3000>,
<0x40230000 0x3000>;
#dma-cells = <2>;
dma-channels = <32>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx-0-15",
"tx-16-31",
"err";
clocks = <&clks 63>, <&clks 64>;
clock-names = "dmamux0", "dmamux1";
};
uart2: serial@402bc000 {
compatible = "nxp,s32g2-linflexuart",
"fsl,s32v234-linflexuart";

34
arch/arm64/boot/dts/freescale/s32g3.dtsi
View File

@ -374,6 +374,23 @@ usdhc0-200mhz-grp4 {
};
};
edma0: dma-controller@40144000 {
compatible = "nxp,s32g3-edma", "nxp,s32g2-edma";
reg = <0x40144000 0x24000>,
<0x4012c000 0x3000>,
<0x40130000 0x3000>;
#dma-cells = <2>;
dma-channels = <32>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx-0-15",
"tx-16-31",
"err";
clocks = <&clks 63>, <&clks 64>;
clock-names = "dmamux0", "dmamux1";
};
uart0: serial@401c8000 {
compatible = "nxp,s32g3-linflexuart",
"fsl,s32v234-linflexuart";
@ -426,6 +443,23 @@ i2c2: i2c@401ec000 {
status = "disabled";
};
edma1: dma-controller@40244000 {
compatible = "nxp,s32g3-edma", "nxp,s32g2-edma";
reg = <0x40244000 0x24000>,
<0x4022c000 0x3000>,
<0x40230000 0x3000>;
#dma-cells = <2>;
dma-channels = <32>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx-0-15",
"tx-16-31",
"err";
clocks = <&clks 63>, <&clks 64>;
clock-names = "dmamux0", "dmamux1";
};
uart2: serial@402bc000 {
compatible = "nxp,s32g3-linflexuart",
"fsl,s32v234-linflexuart";