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arm64: dts: rockchip: add linestate check dis quirk for rk3399 dwc3
rk3399 dwc3 has a problem that USB 2.0 MAC lineState not reflect the expected line state (J) during transmission. Add this quirk to add the ipgap between (tkn to tkn/data) with 40 bit times of TXENDDELAY, and linestate is ignored during this 40 bit times delay. Change-Id: Ife9d46dbf2a8d4a8faa2fc20bfad442d6bb88a05 Signed-off-by: William Wu <william.wu@rock-chips.com>
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@ -402,6 +402,7 @@ usbdrd_dwc3_0: dwc3@fe800000 {
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snps,dis-u2-freeclk-exists-quirk;
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snps,dis_u2_susphy_quirk;
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snps,dis-del-phy-power-chg-quirk;
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snps,tx-ipgap-linecheck-dis-quirk;
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snps,xhci-slow-suspend-quirk;
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status = "disabled";
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};
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@ -432,6 +433,7 @@ usbdrd_dwc3_1: dwc3@fe900000 {
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snps,dis-u2-freeclk-exists-quirk;
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snps,dis_u2_susphy_quirk;
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snps,dis-del-phy-power-chg-quirk;
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snps,tx-ipgap-linecheck-dis-quirk;
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snps,xhci-slow-suspend-quirk;
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status = "disabled";
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};
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