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drm/amd/display: w/a to program DISPCLK_R_GATE_DISABLE DCN35

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[WHY & HOW]
Cursor corruption observed on USBC display with specific system setup with a
reboot. Cursor memory might still in the lightsleep state due to voltage
issue, we need program DISPCLK_R_GATE_DISABLE to avoid this issue only on
DCN35.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yihan Zhu 2024-10-07 14:32:59 -04:00 committed by Alex Deucher
parent 9b47278cec
commit 9bdcf2a5c6
3 changed files with 20 additions and 4 deletions
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1
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h
View File

@ -690,6 +690,7 @@ struct dcn20_dpp {
int lb_memory_size;
int lb_bits_per_entry;
bool is_write_to_ram_a_safe;
bool dispclk_r_gate_disable;
struct scaler_data scl_data;
struct pwl_params pwl_data;
};

1
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h
View File

@ -572,6 +572,7 @@ struct dcn3_dpp {
int lb_memory_size;
int lb_bits_per_entry;
bool is_write_to_ram_a_safe;
bool dispclk_r_gate_disable;
struct scaler_data scl_data;
struct pwl_params pwl_data;
};

22
drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
View File

@ -50,11 +50,21 @@ void dpp35_dppclk_control(
DPPCLK_RATE_CONTROL, dppclk_div,
DPP_CLOCK_ENABLE, 1);
else
REG_UPDATE(DPP_CONTROL,
DPP_CLOCK_ENABLE, 1);
if (dpp->dispclk_r_gate_disable)
REG_UPDATE_2(DPP_CONTROL,
DPP_CLOCK_ENABLE, 1,
DISPCLK_R_GATE_DISABLE, 1);
else
REG_UPDATE(DPP_CONTROL,
DPP_CLOCK_ENABLE, 1);
} else
REG_UPDATE(DPP_CONTROL,
DPP_CLOCK_ENABLE, 0);
if (dpp->dispclk_r_gate_disable)
REG_UPDATE_2(DPP_CONTROL,
DPP_CLOCK_ENABLE, 0,
DISPCLK_R_GATE_DISABLE, 0);
else
REG_UPDATE(DPP_CONTROL,
DPP_CLOCK_ENABLE, 0);
}
void dpp35_program_bias_and_scale_fcnv(
@ -126,6 +136,10 @@ bool dpp35_construct(
(const struct dcn3_dpp_mask *)(tf_mask));
dpp->base.funcs = &dcn35_dpp_funcs;
// w/a for cursor memory stuck in LS by programming DISPCLK_R_GATE_DISABLE, limit w/a to some ASIC revs
if (dpp->base.ctx->asic_id.hw_internal_rev <= 0x10)
dpp->dispclk_r_gate_disable = true;
return ret;
}