drm/msm/adreno: use new helper to set macrotile_mode

Use freshly defined helper instead of using the raw value from the
database.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/726493/
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-9-72f2749bc807@oss.qualcomm.com
This commit is contained in:
Dmitry Baryshkov 2026-05-20 17:51:16 +03:00
parent 1a8996b452
commit 9bd4451e53
2 changed files with 2 additions and 2 deletions

View File

@ -791,7 +791,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
min_acc_len_64b << 23 | hbb_lo << 21);
gpu_write(gpu, REG_A6XX_RBBM_NC_MODE_CNTL,
cfg->macrotile_mode);
qcom_ubwc_macrotile_mode(cfg));
}
static void a7xx_patch_pwrup_reglist(struct msm_gpu *gpu)

View File

@ -439,7 +439,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
case MSM_PARAM_MACROTILE_MODE:
if (!adreno_gpu->ubwc_config)
return UERR(ENOENT, drm, "no UBWC on this platform");
*value = adreno_gpu->ubwc_config->macrotile_mode;
*value = qcom_ubwc_macrotile_mode(adreno_gpu->ubwc_config);
return 0;
case MSM_PARAM_UCHE_TRAP_BASE:
*value = adreno_gpu->uche_trap_base;