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platform/x86: ISST: Use PP level enable mask

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Add check for enabled levels only when reading MMIO. Some levels can be
disabled by BIOS. If the level is not enabled, return an error.

Reset the enable and allowed level masks if there is a failure to add a
perf level.

Fixes: ea009e4769 ("platform/x86: ISST: Add SST-PP support via TPMI")
Cc: stable@vger.kernel.org
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://patch.msgid.link/20260811221514.3905817-6-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
This commit is contained in:
Srinivas Pandruvada 2026-08-11 15:15:13 -07:00 committed by Ilpo Järvinen
parent 574b59bb4b
commit 9b9026943b
No known key found for this signature in database
GPG Key ID: 59AC4F6153E5CE31
1 changed files with 14 additions and 2 deletions
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16
drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
View File

@ -336,8 +336,11 @@ static int sst_add_perf_profiles(struct auxiliary_device *auxdev,
int i;
pd_info->perf_levels = devm_kcalloc(dev, levels, sizeof(struct perf_level), GFP_KERNEL);
if (!pd_info->perf_levels)
if (!pd_info->perf_levels) {
pd_info->pp_header.allowed_level_mask = 0;
pd_info->pp_header.level_en_mask = 0;
return 0;
}
pd_info->ratio_unit = pd_info->pp_header.ratio_unit;
pd_info->avx_levels = SST_MAX_AVX_LEVELS;
@ -911,7 +914,7 @@ static int isst_if_get_perf_level(void __user *argp)
SST_PP_FEATURE_STATE_START, SST_PP_FEATURE_STATE_WIDTH, SST_MUL_FACTOR_NONE)
perf_level.enabled = !!(power_domain_info->sst_header.cap_mask & BIT(1));
level_mask = perf_level.level_mask;
level_mask = perf_level.level_mask & power_domain_info->pp_header.level_en_mask;
perf_level.sst_bf_support = 0;
for_each_set_bit(level, &level_mask, BITS_PER_BYTE) {
/*
@ -1349,6 +1352,9 @@ static int isst_if_get_base_freq_info(void __user *argp)
if (base_freq.level > power_domain_info->max_level)
return -EINVAL;
if (!(power_domain_info->pp_header.level_en_mask & BIT(base_freq.level)))
return -EINVAL;
_read_bf_level_info("p1_high", base_freq.high_base_freq_mhz, base_freq.level,
SST_BF_INFO_0_OFFSET, SST_BF_P1_HIGH_START, SST_BF_P1_HIGH_WIDTH,
SST_MUL_FACTOR_FREQ)
@ -1388,6 +1394,9 @@ static int isst_if_get_base_freq_mask(void __user *argp)
if (cpumask.level > power_domain_info->max_level)
return -EINVAL;
if (!(power_domain_info->pp_header.level_en_mask & BIT(cpumask.level)))
return -EINVAL;
_read_bf_level_info("BF-cpumask", mask, cpumask.level, SST_BF_INFO_1_OFFSET,
P1_HI_CORE_MASK_START, P1_HI_CORE_MASK_WIDTH,
SST_MUL_FACTOR_NONE)
@ -1483,6 +1492,9 @@ static int isst_if_get_turbo_freq_info(void __user *argp)
if (turbo_freq.level > power_domain_info->max_level)
return -EINVAL;
if (!(power_domain_info->pp_header.level_en_mask & BIT(turbo_freq.level)))
return -EINVAL;
turbo_freq.max_buckets = TRL_MAX_BUCKETS;
turbo_freq.max_trl_levels = TRL_MAX_LEVELS;
turbo_freq.max_clip_freqs = SST_TF_MAX_LP_CLIP_RATIOS;