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Merge branch 'pci/controller/dwc-qcom'
- Parse PERST# from all PCIe bridge nodes for future platforms that will have PERST# in Switch Downstream Ports as well as in Root Ports (Manivannan Sadhasivam) - Rename qcom PERST# assert/deassert helpers, e.g., qcom_ep_reset_assert(), to avoid confusion with Endpoint interfaces (Manivannan Sadhasivam) * pci/controller/dwc-qcom: PCI: qcom: Rename PERST# assert/deassert helpers for uniformity PCI: qcom: Parse PERST# from all PCIe bridge nodes # Conflicts: # drivers/pci/controller/dwc/pcie-qcom.c
This commit is contained in:
commit
9b2e9baa9f
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@ -261,10 +261,15 @@ struct qcom_pcie_cfg {
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bool no_l0s;
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};
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struct qcom_pcie_perst {
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struct list_head list;
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struct gpio_desc *desc;
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};
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struct qcom_pcie_port {
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struct list_head list;
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struct gpio_desc *reset;
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struct phy *phy;
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struct list_head perst;
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};
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struct qcom_pcie {
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@ -283,27 +288,30 @@ struct qcom_pcie {
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#define to_qcom_pcie(x) dev_get_drvdata((x)->dev)
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static void qcom_perst_assert(struct qcom_pcie *pcie, bool assert)
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static void __qcom_pcie_perst_assert(struct qcom_pcie *pcie, bool assert)
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{
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struct qcom_pcie_perst *perst;
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struct qcom_pcie_port *port;
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int val = assert ? 1 : 0;
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list_for_each_entry(port, &pcie->ports, list)
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gpiod_set_value_cansleep(port->reset, val);
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list_for_each_entry(port, &pcie->ports, list) {
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list_for_each_entry(perst, &port->perst, list)
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gpiod_set_value_cansleep(perst->desc, val);
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}
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usleep_range(PERST_DELAY_US, PERST_DELAY_US + 500);
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}
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static void qcom_ep_reset_assert(struct qcom_pcie *pcie)
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static void qcom_pcie_perst_assert(struct qcom_pcie *pcie)
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{
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qcom_perst_assert(pcie, true);
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__qcom_pcie_perst_assert(pcie, true);
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}
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static void qcom_ep_reset_deassert(struct qcom_pcie *pcie)
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static void qcom_pcie_perst_deassert(struct qcom_pcie *pcie)
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{
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/* Ensure that PERST has been asserted for at least 100 ms */
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/* Ensure that PERST# has been asserted for at least 100 ms */
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msleep(PCIE_T_PVPERL_MS);
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qcom_perst_assert(pcie, false);
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__qcom_pcie_perst_assert(pcie, false);
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}
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static int qcom_pcie_start_link(struct dw_pcie *pci)
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@ -1282,7 +1290,7 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
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struct qcom_pcie *pcie = to_qcom_pcie(pci);
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int ret;
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qcom_ep_reset_assert(pcie);
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qcom_pcie_perst_assert(pcie);
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ret = pcie->cfg->ops->init(pcie);
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if (ret)
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@ -1309,7 +1317,7 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
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dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
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dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
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qcom_ep_reset_deassert(pcie);
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qcom_pcie_perst_deassert(pcie);
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if (pcie->cfg->ops->config_sid) {
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ret = pcie->cfg->ops->config_sid(pcie);
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@ -1320,7 +1328,7 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
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return 0;
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err_assert_reset:
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qcom_ep_reset_assert(pcie);
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qcom_pcie_perst_assert(pcie);
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err_pwrctrl_power_off:
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pci_pwrctrl_power_off_devices(pci->dev);
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err_pwrctrl_destroy:
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@ -1339,7 +1347,7 @@ static void qcom_pcie_host_deinit(struct dw_pcie_rp *pp)
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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struct qcom_pcie *pcie = to_qcom_pcie(pci);
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qcom_ep_reset_assert(pcie);
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qcom_pcie_perst_assert(pcie);
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/*
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* No need to destroy pwrctrl devices as this function only gets called
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@ -1679,19 +1687,59 @@ static const struct pci_ecam_ops pci_qcom_ecam_ops = {
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}
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};
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/* Parse PERST# from all nodes in depth first manner starting from @np */
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static int qcom_pcie_parse_perst(struct qcom_pcie *pcie,
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struct qcom_pcie_port *port,
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struct device_node *np)
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{
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struct device *dev = pcie->pci->dev;
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struct qcom_pcie_perst *perst;
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struct gpio_desc *reset;
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int ret;
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if (!of_find_property(np, "reset-gpios", NULL))
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goto parse_child_node;
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reset = devm_fwnode_gpiod_get(dev, of_fwnode_handle(np), "reset",
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GPIOD_OUT_HIGH, "PERST#");
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if (IS_ERR(reset)) {
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/*
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* FIXME: GPIOLIB currently supports exclusive GPIO access only.
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* Non exclusive access is broken. But shared PERST# requires
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* non-exclusive access. So once GPIOLIB properly supports it,
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* implement it here.
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*/
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if (PTR_ERR(reset) == -EBUSY)
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dev_err(dev, "Shared PERST# is not supported\n");
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return PTR_ERR(reset);
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}
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perst = devm_kzalloc(dev, sizeof(*perst), GFP_KERNEL);
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if (!perst)
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return -ENOMEM;
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INIT_LIST_HEAD(&perst->list);
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perst->desc = reset;
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list_add_tail(&perst->list, &port->perst);
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parse_child_node:
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for_each_available_child_of_node_scoped(np, child) {
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ret = qcom_pcie_parse_perst(pcie, port, child);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node)
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{
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struct device *dev = pcie->pci->dev;
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struct qcom_pcie_port *port;
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struct gpio_desc *reset;
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struct phy *phy;
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int ret;
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reset = devm_fwnode_gpiod_get(dev, of_fwnode_handle(node),
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"reset", GPIOD_OUT_HIGH, "PERST#");
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if (IS_ERR(reset))
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return PTR_ERR(reset);
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phy = devm_of_phy_get(dev, node, NULL);
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if (IS_ERR(phy))
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return PTR_ERR(phy);
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@ -1704,7 +1752,12 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
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if (ret)
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return ret;
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port->reset = reset;
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INIT_LIST_HEAD(&port->perst);
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ret = qcom_pcie_parse_perst(pcie, port, node);
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if (ret)
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return ret;
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port->phy = phy;
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INIT_LIST_HEAD(&port->list);
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list_add_tail(&port->list, &pcie->ports);
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@ -1714,9 +1767,10 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
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static int qcom_pcie_parse_ports(struct qcom_pcie *pcie)
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{
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struct qcom_pcie_perst *perst, *tmp_perst;
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struct qcom_pcie_port *port, *tmp_port;
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struct device *dev = pcie->pci->dev;
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struct qcom_pcie_port *port, *tmp;
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int ret = -ENOENT;
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int ret = -ENODEV;
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for_each_available_child_of_node_scoped(dev->of_node, of_port) {
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if (!of_node_is_type(of_port, "pci"))
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@ -1729,7 +1783,9 @@ static int qcom_pcie_parse_ports(struct qcom_pcie *pcie)
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return ret;
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err_port_del:
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list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
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list_for_each_entry_safe(port, tmp_port, &pcie->ports, list) {
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list_for_each_entry_safe(perst, tmp_perst, &port->perst, list)
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list_del(&perst->list);
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phy_exit(port->phy);
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list_del(&port->list);
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}
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@ -1740,6 +1796,7 @@ static int qcom_pcie_parse_ports(struct qcom_pcie *pcie)
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static int qcom_pcie_parse_legacy_binding(struct qcom_pcie *pcie)
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{
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struct device *dev = pcie->pci->dev;
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struct qcom_pcie_perst *perst;
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struct qcom_pcie_port *port;
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struct gpio_desc *reset;
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struct phy *phy;
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@ -1761,19 +1818,28 @@ static int qcom_pcie_parse_legacy_binding(struct qcom_pcie *pcie)
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if (!port)
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return -ENOMEM;
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port->reset = reset;
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perst = devm_kzalloc(dev, sizeof(*perst), GFP_KERNEL);
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if (!perst)
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return -ENOMEM;
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port->phy = phy;
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INIT_LIST_HEAD(&port->list);
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list_add_tail(&port->list, &pcie->ports);
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perst->desc = reset;
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INIT_LIST_HEAD(&port->perst);
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INIT_LIST_HEAD(&perst->list);
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list_add_tail(&perst->list, &port->perst);
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return 0;
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}
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static int qcom_pcie_probe(struct platform_device *pdev)
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{
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struct qcom_pcie_perst *perst, *tmp_perst;
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struct qcom_pcie_port *port, *tmp_port;
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const struct qcom_pcie_cfg *pcie_cfg;
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unsigned long max_freq = ULONG_MAX;
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struct qcom_pcie_port *port, *tmp;
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struct device *dev = &pdev->dev;
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struct dev_pm_opp *opp;
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struct qcom_pcie *pcie;
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@ -1913,7 +1979,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
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ret = qcom_pcie_parse_ports(pcie);
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if (ret) {
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if (ret != -ENOENT) {
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if (ret != -ENODEV) {
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dev_err_probe(pci->dev, ret,
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"Failed to parse Root Port: %d\n", ret);
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goto err_pm_runtime_put;
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@ -1945,7 +2011,9 @@ static int qcom_pcie_probe(struct platform_device *pdev)
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return 0;
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err_phy_exit:
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list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
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list_for_each_entry_safe(port, tmp_port, &pcie->ports, list) {
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list_for_each_entry_safe(perst, tmp_perst, &port->perst, list)
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list_del(&perst->list);
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phy_exit(port->phy);
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list_del(&port->list);
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}
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