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ath9k: Check the return value of pcie_capability_read_*()
On failure pcie_capability_read_dword() sets it's last parameter, val to 0. However, with Patch 14/14, it is possible that val is set to ~0 on failure. This would introduce a bug because (x & x) == (~0 & x). This bug can be avoided without changing the function's behaviour if the return value of pcie_capability_read_dword is checked to confirm success. Check the return value of pcie_capability_read_dword() to ensure success. Suggested-by: Bjorn Helgaas <bjorn@helgaas.com> Signed-off-by: Bolarinwa Olayemi Saheed <refactormyself@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200713175529.29715-2-refactormyself@gmail.com
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@ -825,6 +825,7 @@ static void ath_pci_aspm_init(struct ath_common *common)
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struct pci_dev *pdev = to_pci_dev(sc->dev);
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struct pci_dev *parent;
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u16 aspm;
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int ret;
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if (!ah->is_pciexpress)
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return;
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@ -866,8 +867,8 @@ static void ath_pci_aspm_init(struct ath_common *common)
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if (AR_SREV_9462(ah))
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pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
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pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
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if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
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ret = pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
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if (!ret && (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1))) {
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ah->aspm_enabled = true;
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/* Initialize PCIe PM and SERDES registers. */
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ath9k_hw_configpcipowersave(ah, false);
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