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drm/i915/display: Disable PSR2 sel fetch in TGL pre-production

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The implementation of two workarounds are missing causing failures
in CI with pre-production HW.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210505213801.80772-1-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza 2021-05-05 14:38:01 -07:00
parent 7973cff7be
commit 9a5b5e1b98
1 changed files with 7 additions and 0 deletions
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7
drivers/gpu/drm/i915/display/intel_psr.c
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@ -720,6 +720,13 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
}
}
/* Wa_14010254185 Wa_14010103792 */
if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) {
drm_dbg_kms(&dev_priv->drm,
"PSR2 sel fetch not enabled, missing the implementation of WAs\n");
return false;
}
return crtc_state->enable_psr2_sel_fetch = true;
}