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arm64: dts: renesas: Add pinctrl reset-names for RZ/G2L and RZ/V2H family SoCs

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Add reset-names properties to the pin control nodes for
RZ/{G2L,G2UL,G3E,G3S} and RZ/{V2H,V2L,V2N} SoCs.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260317101627.174491-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2026-03-17 10:16:16 +00:00 committed by Geert Uytterhoeven
parent fdbf2cfbac
commit 998dd840cc
7 changed files with 7 additions and 0 deletions
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1
arch/arm64/boot/dts/renesas/r9a07g043.dtsi
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@ -604,6 +604,7 @@ pinctrl: pinctrl@11030000 {
resets = <&cpg R9A07G043_GPIO_RSTN>,
<&cpg R9A07G043_GPIO_PORT_RESETN>,
<&cpg R9A07G043_GPIO_SPARE_RESETN>;
reset-names = "rstn", "port", "spare";
};
dmac: dma-controller@11820000 {

1
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
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@ -1017,6 +1017,7 @@ pinctrl: pinctrl@11030000 {
resets = <&cpg R9A07G044_GPIO_RSTN>,
<&cpg R9A07G044_GPIO_PORT_RESETN>,
<&cpg R9A07G044_GPIO_SPARE_RESETN>;
reset-names = "rstn", "port", "spare";
};
irqc: interrupt-controller@110a0000 {

1
arch/arm64/boot/dts/renesas/r9a07g054.dtsi
View File

@ -1025,6 +1025,7 @@ pinctrl: pinctrl@11030000 {
resets = <&cpg R9A07G054_GPIO_RSTN>,
<&cpg R9A07G054_GPIO_PORT_RESETN>,
<&cpg R9A07G054_GPIO_SPARE_RESETN>;
reset-names = "rstn", "port", "spare";
};
irqc: interrupt-controller@110a0000 {

1
arch/arm64/boot/dts/renesas/r9a08g045.dtsi
View File

@ -533,6 +533,7 @@ pinctrl: pinctrl@11030000 {
resets = <&cpg R9A08G045_GPIO_RSTN>,
<&cpg R9A08G045_GPIO_PORT_RESETN>,
<&cpg R9A08G045_GPIO_SPARE_RESETN>;
reset-names = "rstn", "port", "spare";
};
irqc: interrupt-controller@11050000 {

1
arch/arm64/boot/dts/renesas/r9a09g047.dtsi
View File

@ -265,6 +265,7 @@ pinctrl: pinctrl@10410000 {
interrupt-parent = <&icu>;
power-domains = <&cpg>;
resets = <&cpg 0xa5>, <&cpg 0xa6>;
reset-names = "main", "error";
};
cpg: clock-controller@10420000 {

1
arch/arm64/boot/dts/renesas/r9a09g056.dtsi
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@ -288,6 +288,7 @@ pinctrl: pinctrl@10410000 {
gpio-ranges = <&pinctrl 0 0 96>;
power-domains = <&cpg>;
resets = <&cpg 0xa5>, <&cpg 0xa6>;
reset-names = "main", "error";
};
cpg: clock-controller@10420000 {

1
arch/arm64/boot/dts/renesas/r9a09g057.dtsi
View File

@ -270,6 +270,7 @@ pinctrl: pinctrl@10410000 {
interrupt-parent = <&icu>;
power-domains = <&cpg>;
resets = <&cpg 0xa5>, <&cpg 0xa6>;
reset-names = "main", "error";
};
cpg: clock-controller@10420000 {