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drm/amdgpu: Init partition_mode and xcc_mask for GFX_IMU_PARTITION_SWITCH

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Set partition_mode and physical xcc mask fields in
GFX_IMU_PARTITION_SWITCH register

v2: cleanup (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2025-06-15 14:28:20 +08:00 committed by Alex Deucher
parent e2a6a4e6d4
commit 9987a6f34e
3 changed files with 6 additions and 3 deletions
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3
drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h
View File

@ -37,7 +37,8 @@ struct amdgpu_imu_funcs {
void (*program_rlc_ram)(struct amdgpu_device *adev);
int (*wait_for_reset_status)(struct amdgpu_device *adev);
int (*switch_compute_partition)(struct amdgpu_device *adev,
int num_xccs_per_xcp);
int num_xccs_per_xcp,
int compute_partition_mode);
};
struct imu_rlc_ram_golden {

4
drivers/gpu/drm/amd/amdgpu/imu_v12_1.c
View File

@ -134,11 +134,13 @@ static int imu_v12_1_load_microcode(struct amdgpu_device *adev)
}
static int imu_v12_1_switch_compute_partition(struct amdgpu_device *adev,
int num_xccs_per_xcp)
int num_xccs_per_xcp,
int compute_partition_mode)
{
int ret;
if (adev->psp.funcs) {
/*TODO: revisit asp interface once it's avaialble */
ret = psp_spatial_partition(&adev->psp,
NUM_XCC(adev->gfx.xcc_mask) /
num_xccs_per_xcp);

2
drivers/gpu/drm/amd/amdgpu/soc_v1_0.c
View File

@ -652,7 +652,7 @@ static int soc_v1_0_switch_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr,
num_xcc_per_xcp = __soc_v1_0_get_xcc_per_xcp(xcp_mgr, mode);
if (adev->gfx.imu.funcs &&
adev->gfx.imu.funcs->switch_compute_partition)
adev->gfx.imu.funcs->switch_compute_partition(xcp_mgr->adev, num_xcc_per_xcp);
adev->gfx.imu.funcs->switch_compute_partition(xcp_mgr->adev, num_xcc_per_xcp, mode);
/* Init info about new xcps */
*num_xcps = num_xcc / num_xcc_per_xcp;