From 99079676c225d3e89cd5c4993a8d028f7ef9f6ae Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Fri, 9 Feb 2018 21:10:20 +0800
Subject: [PATCH] arm64: dts: rockchip: increase the i2c0 scl frequecny to 400k
 for rk3326-evb-lp3-v10

Base on the rise time of scl test, the scl frequecny could be
increased to 400k.

Change-Id: I9af57e13a97f0866ec4f0dd295f9bcf4cbeee304
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
index 8ff707b7d58a..f5fd78774776 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
@@ -336,6 +336,9 @@ &gpu {
 
 &i2c0 {
 	status = "okay";
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <280>;
+	i2c-scl-falling-time-ns = <16>;
 
 	rk817: pmic@20 {
 		compatible = "rockchip,rk817";