From 9904402cf417140f0dbdd0b9b3b5f5fd0527a447 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 3 Jul 2026 12:04:00 +0200 Subject: [PATCH] clk: qcom: Restrict A7PLL and IPQ4019 GCC to ARM IPQ4019 is ARM 32-bit only SoC and QCOM_A7PLL is used only on SDX55 and SDX65, which are 32-bit as well. Do not allow building them for ARM64 to make built kernels smaller and user choices easier. Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-2-78894525e54a@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index d5fcdff954db..5ec1da999e52 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -282,6 +282,7 @@ config QCOM_A53PLL config QCOM_A7PLL tristate "A7 PLL driver for SDX55 and SDX65" + depends on ARM || COMPILE_TEST help Support for the A7 PLL on SDX55 and SDX65 devices. It provides the CPU with frequencies above 1GHz. @@ -438,6 +439,7 @@ config IPQ_CMN_PLL config IPQ_GCC_4019 tristate "IPQ4019 Global Clock Controller" + depends on ARM || COMPILE_TEST help Support for the global clock controller on ipq4019 devices. Say Y if you want to use peripheral devices such as UART, SPI,