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Merge branch '7.1/scsi-queue' into 7.1/scsi-fixes
Pull in remaining commits from 7.1/scsi-queue. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
commit
98f69975d4
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@ -37,7 +37,7 @@
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#define TPGS_MODE_EXPLICIT 0x2
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#define ALUA_RTPG_SIZE 128
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#define ALUA_FAILOVER_TIMEOUT 60
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#define ALUA_FAILOVER_TIMEOUT 255 /* max 255 (8-bit value) */
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#define ALUA_FAILOVER_RETRIES 5
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#define ALUA_RTPG_DELAY_MSECS 5
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#define ALUA_RTPG_RETRY_DELAY 2
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@ -1491,7 +1491,7 @@ static void prep_ata_v3_hw(struct hisi_hba *hisi_hba,
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phy_id = device->phy->identify.phy_identifier;
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hdr->dw0 |= cpu_to_le32((1U << phy_id)
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<< CMD_HDR_PHY_ID_OFF);
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hdr->dw0 |= CMD_HDR_FORCE_PHY_MSK;
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hdr->dw0 |= cpu_to_le32(CMD_HDR_FORCE_PHY_MSK);
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hdr->dw0 |= cpu_to_le32(4U << CMD_HDR_CMD_OFF);
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}
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@ -2738,8 +2738,20 @@ scsih_sdev_configure(struct scsi_device *sdev, struct queue_limits *lim)
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pcie_device->enclosure_level,
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pcie_device->connector_name);
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/*
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* The HBA firmware passes the NVMe drive's MDTS
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* (Maximum Data Transfer Size) up to the driver. However,
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* the driver hardcodes a 4K buffer size for the PRP list,
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* accommodating at most 512 entries. This strictly limits
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* the maximum supported NVMe I/O transfer to 2 MiB.
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*
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* Cap max_hw_sectors to the smaller of the drive's reported
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* MDTS or the 2 MiB driver limit to prevent kernel oopses.
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*/
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lim->max_hw_sectors = SZ_2M >> SECTOR_SHIFT;
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if (pcie_device->nvme_mdts)
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lim->max_hw_sectors = pcie_device->nvme_mdts / 512;
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lim->max_hw_sectors = min(lim->max_hw_sectors,
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pcie_device->nvme_mdts >> SECTOR_SHIFT);
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pcie_device_put(pcie_device);
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spin_unlock_irqrestore(&ioc->pcie_device_lock, flags);
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@ -657,7 +657,7 @@ struct pmcraid_hostrcb {
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*/
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struct pmcraid_instance {
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/* Array of allowed-to-be-exposed resources, initialized from
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* Configutation Table, later updated with CCNs
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* Configuration Table, later updated with CCNs
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*/
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struct pmcraid_resource_entry *res_entries;
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@ -1801,7 +1801,7 @@ sg_start_req(Sg_request *srp, unsigned char *cmd)
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}
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res = blk_rq_map_user_io(rq, md, hp->dxferp, hp->dxfer_len,
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GFP_ATOMIC, iov_count, iov_count, 1, rw);
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GFP_KERNEL, iov_count, iov_count, 1, rw);
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if (!res) {
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srp->bio = rq->bio;
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@ -9427,6 +9427,7 @@ static void pqi_shutdown(struct pci_dev *pci_dev)
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pqi_crash_if_pending_command(ctrl_info);
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pqi_reset(ctrl_info);
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pqi_ctrl_unblock_device_reset(ctrl_info);
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}
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static void pqi_process_lockup_action_param(void)
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@ -995,6 +995,7 @@ int iscsit_setup_scsi_cmd(struct iscsit_conn *conn, struct iscsit_cmd *cmd,
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int data_direction, payload_length;
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struct iscsi_ecdb_ahdr *ecdb_ahdr;
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struct iscsi_scsi_req *hdr;
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u16 ahslength, cdb_length;
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int iscsi_task_attr;
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unsigned char *cdb;
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int sam_task_attr;
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@ -1108,14 +1109,27 @@ int iscsit_setup_scsi_cmd(struct iscsit_conn *conn, struct iscsit_cmd *cmd,
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ISCSI_REASON_CMD_NOT_SUPPORTED, buf);
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}
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cdb = kmalloc(be16_to_cpu(ecdb_ahdr->ahslength) + 15,
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GFP_KERNEL);
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ahslength = be16_to_cpu(ecdb_ahdr->ahslength);
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if (!ahslength) {
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pr_err("Extended CDB AHS with zero length, protocol error.\n");
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return iscsit_add_reject_cmd(cmd,
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ISCSI_REASON_PROTOCOL_ERROR, buf);
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}
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if (ahslength > (hdr->hlength * 4) - 3) {
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pr_err("Extended CDB AHS length %u exceeds available PDU buffer.\n",
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ahslength);
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return iscsit_add_reject_cmd(cmd,
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ISCSI_REASON_PROTOCOL_ERROR, buf);
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}
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cdb_length = ahslength - 1 + ISCSI_CDB_SIZE;
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cdb = kmalloc(cdb_length, GFP_KERNEL);
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if (cdb == NULL)
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return iscsit_add_reject_cmd(cmd,
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ISCSI_REASON_BOOKMARK_NO_RESOURCES, buf);
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memcpy(cdb, hdr->cdb, ISCSI_CDB_SIZE);
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memcpy(cdb + ISCSI_CDB_SIZE, ecdb_ahdr->ecdb,
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be16_to_cpu(ecdb_ahdr->ahslength) - 1);
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memcpy(cdb + ISCSI_CDB_SIZE, ecdb_ahdr->ecdb, cdb_length - ISCSI_CDB_SIZE);
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}
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data_direction = (hdr->flags & ISCSI_FLAG_CMD_WRITE) ? DMA_TO_DEVICE :
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@ -3249,7 +3249,7 @@ static ssize_t target_tg_pt_gp_members_show(struct config_item *item,
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config_item_name(&lun->lun_group.cg_item));
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cur_len++; /* Extra byte for NULL terminator */
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if ((cur_len + len) > PAGE_SIZE) {
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if (cur_len > TG_PT_GROUP_NAME_BUF || (cur_len + len) > PAGE_SIZE) {
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pr_warn("Ran out of lu_gp_show_attr"
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"_members buffer\n");
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break;
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@ -9259,6 +9259,30 @@ static void ufshcd_config_mcq(struct ufs_hba *hba)
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hba->nutrs);
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}
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/**
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* ufshcd_get_op_mode - get UFS operating mode.
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* @hba: per-adapter instance
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*
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* Use the PA_PWRMODE value to represent the operating mode of UFS.
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*
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*/
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static enum ufs_op_mode ufshcd_get_op_mode(struct ufs_hba *hba)
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{
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u32 mode;
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u8 rx_mode;
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u8 tx_mode;
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ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
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rx_mode = (mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK;
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tx_mode = mode & PWRMODE_MASK;
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if ((rx_mode == SLOW_MODE || rx_mode == SLOWAUTO_MODE) &&
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(tx_mode == SLOW_MODE || tx_mode == SLOWAUTO_MODE))
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return LS_MODE;
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return HS_MODE;
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}
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static int ufshcd_post_device_init(struct ufs_hba *hba)
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{
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int ret;
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@ -9281,11 +9305,13 @@ static int ufshcd_post_device_init(struct ufs_hba *hba)
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return 0;
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/*
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* Set the right value to bRefClkFreq before attempting to
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* Set the right value to bRefClkFreq in LS_MODE before attempting to
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* switch to HS gears.
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*/
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if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
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if (ufshcd_get_op_mode(hba) == LS_MODE &&
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hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
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ufshcd_set_dev_ref_clk(hba);
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/* Gear up to HS gear. */
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ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info,
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UFSHCD_PMC_POLICY_DONT_FORCE);
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@ -333,6 +333,11 @@ enum ufs_eom_eye_mask {
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#define DME_LocalTC0ReplayTimeOutVal 0xD042
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#define DME_LocalAFC0ReqTimeOutVal 0xD043
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enum ufs_op_mode {
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LS_MODE = 1,
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HS_MODE = 2,
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};
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/* PA power modes */
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enum ufs_pa_pwr_mode {
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FAST_MODE = 1,
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