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arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000

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The OS PDC DRV register window on sm8450 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260527094333.2311731-12-mukesh.ojha@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Mukesh Ojha 2026-05-27 15:13:16 +05:30 committed by Bjorn Andersson
parent 39be29e1f8
commit 987150965d
1 changed files with 1 additions and 1 deletions
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arch/arm64/boot/dts/qcom/sm8450.dtsi
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@ -3728,7 +3728,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8450-pdc", "qcom,pdc";
reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
<94 609 31>, <125 63 1>, <126 716 12>;
#interrupt-cells = <2>;