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iio: dac: ad3530r: Add support for AD3532R/AD3532
The AD3532R/AD3532 is a 16-channel, 16-bit voltage output DAC. It shares similar functionality with AD3530R but splits its registers into two banks: bank 0 at 0x10xx for channels 0-7 and bank 1 at 0x30xx for channels 8-15. The input, LDAC trigger and operating-mode registers are therefore selected per bank. Add the AD3532R register map, channel specs, per-bank register arrays, a dedicated powerdown handler and its own regmap_config, reusing the table-driven helpers for the shared configuration steps. Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Kim Seer Paller
Jonathan Cameron
parent
7511d97a8f
commit
97e5f68ca4
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@ -11,8 +11,11 @@ config AD3530R
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depends on SPI
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select REGMAP_SPI
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help
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Say yes here to build support for Analog Devices AD3530R, AD3531R
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Digital to Analog Converter.
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Say yes here to build support for the following Analog Devices
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Digital to Analog Converters:
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- AD3530/AD3530R (8-channel)
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- AD3531/AD3531R (4-channel)
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- AD3532/AD3532R (16-channel)
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To compile this driver as a module, choose M here: the
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module will be called ad3530r.
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@ -2,6 +2,7 @@
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/*
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* AD3530R/AD3530 8-channel, 16-bit Voltage Output DAC Driver
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* AD3531R/AD3531 4-channel, 16-bit Voltage Output DAC Driver
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* AD3532R/AD3532 16-channel, 16-bit Voltage Output DAC Driver
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*
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* Copyright 2025 Analog Devices Inc.
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*/
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@ -39,6 +40,25 @@
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#define AD3531R_SW_LDAC_TRIG_A 0xDD
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#define AD3531R_INPUT_CH 0xE3
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/* AD3532R/AD3532 bank 0 registers (channels 0-7) */
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#define AD3532R_INTERFACE_CONFIG_A_0 0x1000
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#define AD3532R_OUTPUT_OPERATING_MODE_0 0x1020
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#define AD3532R_OUTPUT_OPERATING_MODE_1 0x1021
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#define AD3532R_OUTPUT_CONTROL_0 0x102A
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#define AD3532R_REFERENCE_CONTROL_0 0x103C
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#define AD3532R_SW_LDAC_TRIG_0 0x10E5
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#define AD3532R_INPUT_CH_0 0x10EB
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/* AD3532R/AD3532 bank 1 registers (channels 8-15) */
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#define AD3532R_INTERFACE_CONFIG_A_1 0x3000
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#define AD3532R_OUTPUT_OPERATING_MODE_2 0x3020
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#define AD3532R_OUTPUT_OPERATING_MODE_3 0x3021
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#define AD3532R_OUTPUT_CONTROL_1 0x302A
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#define AD3532R_REFERENCE_CONTROL_1 0x303C
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#define AD3532R_SW_LDAC_TRIG_1 0x30E5
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#define AD3532R_INPUT_CH_1 0x30EB
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#define AD3532R_MAX_REG_ADDR 0x30F9
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#define AD3530R_SLD_TRIG_A BIT(7)
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#define AD3530R_OUTPUT_CONTROL_RANGE BIT(2)
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#define AD3530R_REFERENCE_CONTROL_SEL BIT(0)
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@ -50,8 +70,10 @@
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#define AD3530R_LDAC_PULSE_US 100
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#define AD3530R_DAC_MAX_VAL GENMASK(15, 0)
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#define AD3530R_MAX_CHANNELS 8
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#define AD3530R_CH_PER_REG 4
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#define AD3530R_CH_PER_BANK 8
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#define AD3531R_MAX_CHANNELS 4
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#define AD3532R_MAX_CHANNELS 16
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enum ad3530r_mode {
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AD3530R_NORMAL_OP,
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@ -85,7 +107,7 @@ struct ad3530r_state {
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struct regmap *regmap;
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/* lock to protect against multiple access to the device and shared data */
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struct mutex lock;
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struct ad3530r_chan chan[AD3530R_MAX_CHANNELS];
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struct ad3530r_chan chan[AD3532R_MAX_CHANNELS];
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const struct ad3530r_chip_info *chip_info;
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struct gpio_desc *ldac_gpio;
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int vref_mV;
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@ -106,6 +128,14 @@ static int ad3531r_input_ch_reg(unsigned int channel)
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return 2 * channel + AD3531R_INPUT_CH;
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}
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static int ad3532r_input_ch_reg(unsigned int channel)
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{
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unsigned int bank = channel / AD3530R_CH_PER_BANK;
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unsigned int local_ch = channel % AD3530R_CH_PER_BANK;
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return 2 * local_ch + (bank ? AD3532R_INPUT_CH_1 : AD3532R_INPUT_CH_0);
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}
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static const char * const ad3530r_powerdown_modes[] = {
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"1kohm_to_gnd",
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"7.7kohm_to_gnd",
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@ -118,6 +148,12 @@ static const char * const ad3531r_powerdown_modes[] = {
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"16kohm_to_gnd",
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};
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static const char * const ad3532r_powerdown_modes[] = {
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"1kohm_to_gnd",
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"10kohm_to_gnd",
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"three_state",
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};
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static int ad3530r_get_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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@ -153,6 +189,13 @@ static const struct iio_enum ad3531r_powerdown_mode_enum = {
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.set = ad3530r_set_powerdown_mode,
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};
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static const struct iio_enum ad3532r_powerdown_mode_enum = {
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.items = ad3532r_powerdown_modes,
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.num_items = ARRAY_SIZE(ad3532r_powerdown_modes),
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.get = ad3530r_get_powerdown_mode,
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.set = ad3530r_set_powerdown_mode,
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};
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static ssize_t ad3530r_get_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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@ -197,6 +240,45 @@ static ssize_t ad3530r_set_dac_powerdown(struct iio_dev *indio_dev,
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return len;
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}
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static ssize_t ad3532r_set_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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unsigned int bank, local_ch, reg_in_bank, ch_in_reg;
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unsigned int reg, mask, val;
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bool powerdown;
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int ret;
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ret = kstrtobool(buf, &powerdown);
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if (ret)
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return ret;
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bank = chan->channel / AD3530R_CH_PER_BANK;
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local_ch = chan->channel % AD3530R_CH_PER_BANK;
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reg_in_bank = local_ch / AD3530R_CH_PER_REG;
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ch_in_reg = local_ch % AD3530R_CH_PER_REG;
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reg = reg_in_bank + (bank ? AD3532R_OUTPUT_OPERATING_MODE_2 :
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AD3532R_OUTPUT_OPERATING_MODE_0);
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mask = AD3530R_OP_MODE_CHAN_MSK(ch_in_reg);
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guard(mutex)(&st->lock);
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if (powerdown) {
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val = field_prep(mask, st->chan[chan->channel].powerdown_mode);
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ret = regmap_update_bits(st->regmap, reg, mask, val);
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} else {
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ret = regmap_clear_bits(st->regmap, reg, mask);
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}
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if (ret)
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return ret;
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st->chan[chan->channel].powerdown = powerdown;
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return len;
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}
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static int ad3530r_trigger_sw_ldac_reg(unsigned int channel)
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{
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return AD3530R_SW_LDAC_TRIG_A;
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@ -207,6 +289,13 @@ static int ad3531r_trigger_sw_ldac_reg(unsigned int channel)
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return AD3531R_SW_LDAC_TRIG_A;
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}
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static int ad3532r_trigger_sw_ldac_reg(unsigned int channel)
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{
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unsigned int bank = channel / AD3530R_CH_PER_BANK;
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return bank ? AD3532R_SW_LDAC_TRIG_1 : AD3532R_SW_LDAC_TRIG_0;
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}
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static int ad3530r_trigger_hw_ldac(struct gpio_desc *ldac_gpio)
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{
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gpiod_set_value_cansleep(ldac_gpio, 1);
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@ -319,6 +408,19 @@ static const struct iio_chan_spec_ext_info ad3531r_ext_info[] = {
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{ }
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};
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static const struct iio_chan_spec_ext_info ad3532r_ext_info[] = {
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{
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.name = "powerdown",
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.shared = IIO_SEPARATE,
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.read = ad3530r_get_dac_powerdown,
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.write = ad3532r_set_dac_powerdown,
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},
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IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad3532r_powerdown_mode_enum),
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IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE,
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&ad3532r_powerdown_mode_enum),
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{ }
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};
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#define AD3530R_CHAN(_chan, _ext_info) \
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{ \
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.type = IIO_VOLTAGE, \
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@ -348,6 +450,25 @@ static const struct iio_chan_spec ad3531r_channels[] = {
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AD3530R_CHAN(3, ad3531r_ext_info),
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};
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static const struct iio_chan_spec ad3532r_channels[] = {
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AD3530R_CHAN(0, ad3532r_ext_info),
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AD3530R_CHAN(1, ad3532r_ext_info),
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AD3530R_CHAN(2, ad3532r_ext_info),
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AD3530R_CHAN(3, ad3532r_ext_info),
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AD3530R_CHAN(4, ad3532r_ext_info),
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AD3530R_CHAN(5, ad3532r_ext_info),
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AD3530R_CHAN(6, ad3532r_ext_info),
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AD3530R_CHAN(7, ad3532r_ext_info),
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AD3530R_CHAN(8, ad3532r_ext_info),
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AD3530R_CHAN(9, ad3532r_ext_info),
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AD3530R_CHAN(10, ad3532r_ext_info),
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AD3530R_CHAN(11, ad3532r_ext_info),
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AD3530R_CHAN(12, ad3532r_ext_info),
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AD3530R_CHAN(13, ad3532r_ext_info),
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AD3530R_CHAN(14, ad3532r_ext_info),
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AD3530R_CHAN(15, ad3532r_ext_info),
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};
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static const unsigned int ad3530r_if_config[] = {
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AD3530R_INTERFACE_CONFIG_A,
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};
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@ -369,12 +490,40 @@ static const unsigned int ad3531r_op_mode[] = {
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AD3530R_OUTPUT_OPERATING_MODE_0,
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};
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static const unsigned int ad3532r_if_config[] = {
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AD3532R_INTERFACE_CONFIG_A_0,
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AD3532R_INTERFACE_CONFIG_A_1,
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};
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static const unsigned int ad3532r_out_ctrl[] = {
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AD3532R_OUTPUT_CONTROL_0,
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AD3532R_OUTPUT_CONTROL_1,
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};
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static const unsigned int ad3532r_ref_ctrl[] = {
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AD3532R_REFERENCE_CONTROL_0,
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AD3532R_REFERENCE_CONTROL_1,
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};
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static const unsigned int ad3532r_op_mode[] = {
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AD3532R_OUTPUT_OPERATING_MODE_0,
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AD3532R_OUTPUT_OPERATING_MODE_1,
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AD3532R_OUTPUT_OPERATING_MODE_2,
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AD3532R_OUTPUT_OPERATING_MODE_3,
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};
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static const struct regmap_config ad3530r_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = AD3530R_MAX_REG_ADDR,
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};
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static const struct regmap_config ad3532r_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = AD3532R_MAX_REG_ADDR,
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};
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static const struct ad3530r_chip_info ad3530_chip = {
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.name = "ad3530",
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.channels = ad3530r_channels,
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@ -439,6 +588,38 @@ static const struct ad3530r_chip_info ad3531r_chip = {
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.internal_ref_support = true,
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};
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static const struct ad3530r_chip_info ad3532_chip = {
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.name = "ad3532",
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.channels = ad3532r_channels,
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.regmap_config = &ad3532r_regmap_config,
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.num_channels = ARRAY_SIZE(ad3532r_channels),
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.sw_ldac_trig_reg = ad3532r_trigger_sw_ldac_reg,
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.input_ch_reg = ad3532r_input_ch_reg,
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.interface_config_a = ad3532r_if_config,
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.output_control = ad3532r_out_ctrl,
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.reference_control = ad3532r_ref_ctrl,
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.op_mode = ad3532r_op_mode,
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.num_banks = ARRAY_SIZE(ad3532r_if_config),
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.num_op_mode_regs = ARRAY_SIZE(ad3532r_op_mode),
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.internal_ref_support = false,
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};
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static const struct ad3530r_chip_info ad3532r_chip = {
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.name = "ad3532r",
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.channels = ad3532r_channels,
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.regmap_config = &ad3532r_regmap_config,
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.num_channels = ARRAY_SIZE(ad3532r_channels),
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.sw_ldac_trig_reg = ad3532r_trigger_sw_ldac_reg,
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.input_ch_reg = ad3532r_input_ch_reg,
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.interface_config_a = ad3532r_if_config,
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.output_control = ad3532r_out_ctrl,
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.reference_control = ad3532r_ref_ctrl,
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.op_mode = ad3532r_op_mode,
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.num_banks = ARRAY_SIZE(ad3532r_if_config),
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.num_op_mode_regs = ARRAY_SIZE(ad3532r_op_mode),
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.internal_ref_support = true,
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};
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static int ad3530r_set_reg_bank_bits(const struct ad3530r_state *st,
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const unsigned int *regs,
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unsigned int num_regs,
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@ -610,6 +791,8 @@ static const struct spi_device_id ad3530r_id[] = {
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{ .name = "ad3530r", .driver_data = (kernel_ulong_t)&ad3530r_chip },
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{ .name = "ad3531", .driver_data = (kernel_ulong_t)&ad3531_chip },
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{ .name = "ad3531r", .driver_data = (kernel_ulong_t)&ad3531r_chip },
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{ .name = "ad3532", .driver_data = (kernel_ulong_t)&ad3532_chip },
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{ .name = "ad3532r", .driver_data = (kernel_ulong_t)&ad3532r_chip },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, ad3530r_id);
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@ -619,6 +802,8 @@ static const struct of_device_id ad3530r_of_match[] = {
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{ .compatible = "adi,ad3530r", .data = &ad3530r_chip },
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{ .compatible = "adi,ad3531", .data = &ad3531_chip },
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{ .compatible = "adi,ad3531r", .data = &ad3531r_chip },
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{ .compatible = "adi,ad3532", .data = &ad3532_chip },
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{ .compatible = "adi,ad3532r", .data = &ad3532r_chip },
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{ }
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};
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MODULE_DEVICE_TABLE(of, ad3530r_of_match);
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