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arm64: dts: ti: k3-am69-sk: Add idle-states for remaining SERDES instances
In AM69 SoC there are 4 instances of the 4 lane SERDES. So in "serdes_ln_ctrl" node there are total 16 entries in "mux-reg-mask" property. But "idle-states" is defined only for the lanes of first two SERDES instances. SERDES lane mapping is left at its reset state of "zero" for all four lanes of SERDES2 and SERDES4. The reset state of "zero" corresponds to the following configuration: Lanes 0 and 1 of SERDES2 are unused CPSW MAC Ports 1 and 2 mapped to lanes 2 and 3 of SERDES2 EDP Lanes 0, 1, 2 and 3 mapped to lanes 0, 1, 2 and 3 of SERDES4 For completeness, define the "idle-states" for the lanes of remaining SERDES instances. Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20250708113942.4137917-1-h-salunke@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -1306,8 +1306,12 @@ partition@3fc0000 {
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&serdes_ln_ctrl {
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idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_PCIE1_LANE1>,
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<J784S4_SERDES0_LANE2_PCIE3_LANE0>, <J784S4_SERDES0_LANE3_USB>,
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<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_PCIE0_LANE1>,
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<J784S4_SERDES1_LANE2_PCIE0_LANE2>, <J784S4_SERDES1_LANE3_PCIE0_LANE3>;
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<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_PCIE0_LANE1>,
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<J784S4_SERDES1_LANE2_PCIE0_LANE2>, <J784S4_SERDES1_LANE3_PCIE0_LANE3>,
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<J784S4_SERDES2_LANE0_IP2_UNUSED>, <J784S4_SERDES2_LANE1_IP2_UNUSED>,
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<J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>,
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<J784S4_SERDES4_LANE0_EDP_LANE0>, <J784S4_SERDES4_LANE1_EDP_LANE1>,
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<J784S4_SERDES4_LANE2_EDP_LANE2>, <J784S4_SERDES4_LANE3_EDP_LANE3>;
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};
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&serdes_wiz0 {
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