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These are cpufreq updates for the ux500
- Updates to the ux500 cpufreq driver - Support for delay timers in the MTU clksrc - Consequential updates to the cpufreq driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJQ6uVLAAoJEEEQszewGV1z6QMP/R+QY/wM+bo5HX09Y0bDR6FP Bosp+RbQi3mQZNbjIk/8TYVKj2Z4FlipIjUJSIjN2KJMynxUI/MiLssU/SJ3GS9J OlhofgtvLpIyGutP6Thdpf1oXxw8OTqChVbUcjkQNbebYsG8TB8wOxIqE5BCaFqn vmSr7gNLsXZdoJEkPMyxUQ+IwFWqoGmJJURS3uBbXr3/J6SZeg1l4vZyLVyM71o8 iP29gENQsL3T9vfwrFBs7YRbV9yhRcSW59f1KshUu7a2llG2lHHba0DzpeTvxiOu YeNQWBcoMRm4/Uu0mg+7nymBv9wYCiddh4G1jZQlK1LpXGrVBgMhmVpeJwW3xp/8 /c8aib3cYRmTEG0L5aotLip4nzw49n/Bn5xAcoLTeorNnWkU1siUEaTv8IgfGnDl M/Mxq7+jT+vemsI+uOMjBG5500AAsEgnO3khkWKdM/a6sAEqvYiksgNJ2gIUBzZZ MJdZWM+MZhdv2KTv9ljz70Gv/XINklbyXA9SqprrGqbTMD4p7gA20PjpYoE941vb gXYuGW8PsLIxN9ObtsXGhFXn9J8bQVWawPfvWf8vXSByWxO/7rOleIiepsJCu+Ao E+abLOP/re9bYi2bJEGmuiaFP6Y2lqwEi11Dd75NYUNbXGhFL0pRDqnb6IS+8MuO B3K3P3ENewCdCgHWzf55 =X8Xm -----END PGP SIGNATURE----- Merge tag 'ux500-cpufreq-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers From Linus Walleij: These are cpufreq updates for the ux500 - Updates to the ux500 cpufreq driver - Support for delay timers in the MTU clksrc - Consequential updates to the cpufreq driver * tag 'ux500-cpufreq-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: cpufreq: db8500: set CPUFREQ_CONST_LOOPS clocksource: nomadik-mtu: support timer-based delay cpufreq: dbx500: Update file header cpufreq: dbx500: Minor code cleanup cpufreq: dbx500: Move clk_get to probe mfd: db8500: Update cpufreq device name cpufreq: Give driver used for dbx500 family a more generic name Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
96e61b8e34
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@ -15,6 +15,7 @@
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#include <linux/clocksource.h>
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#include <linux/clk.h>
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#include <linux/jiffies.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/platform_data/clocksource-nomadik-mtu.h>
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#include <asm/mach/time.h>
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@ -64,6 +65,7 @@ static void __iomem *mtu_base;
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static bool clkevt_periodic;
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static u32 clk_prescale;
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static u32 nmdk_cycle; /* write-once */
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static struct delay_timer mtu_delay_timer;
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#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
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/*
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@ -80,6 +82,11 @@ static u32 notrace nomadik_read_sched_clock(void)
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}
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#endif
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static unsigned long nmdk_timer_read_current_timer(void)
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{
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return ~readl_relaxed(mtu_base + MTU_VAL(0));
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}
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/* Clockevent device: use one-shot mode */
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static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
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{
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@ -227,4 +234,8 @@ void __init nmdk_timer_init(void __iomem *base, int irq)
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setup_irq(irq, &nmdk_timer_irq);
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nmdk_clkevt.cpumask = cpumask_of(0);
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clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
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mtu_delay_timer.read_current_timer = &nmdk_timer_read_current_timer;
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mtu_delay_timer.freq = rate;
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register_current_timer_delay(&mtu_delay_timer);
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}
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@ -41,7 +41,7 @@ obj-$(CONFIG_X86_CPUFREQ_NFORCE2) += cpufreq-nforce2.o
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##################################################################################
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# ARM SoC drivers
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obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o
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obj-$(CONFIG_UX500_SOC_DB8500) += dbx500-cpufreq.o
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obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o
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obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o
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obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o
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@ -1,13 +1,13 @@
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/*
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* Copyright (C) STMicroelectronics 2009
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* Copyright (C) ST-Ericsson SA 2010
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* Copyright (C) ST-Ericsson SA 2010-2012
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*
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* License Terms: GNU General Public License v2
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* Author: Sundar Iyer <sundar.iyer@stericsson.com>
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* Author: Martin Persson <martin.persson@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/cpufreq.h>
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@ -20,22 +20,23 @@
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static struct cpufreq_frequency_table *freq_table;
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static struct clk *armss_clk;
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static struct freq_attr *db8500_cpufreq_attr[] = {
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static struct freq_attr *dbx500_cpufreq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static int db8500_cpufreq_verify_speed(struct cpufreq_policy *policy)
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static int dbx500_cpufreq_verify_speed(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, freq_table);
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}
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static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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static int dbx500_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cpufreq_freqs freqs;
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unsigned int idx;
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int ret;
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/* scale the target frequency to one of the extremes supported */
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if (target_freq < policy->cpuinfo.min_freq)
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@ -44,10 +45,9 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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target_freq = policy->cpuinfo.max_freq;
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/* Lookup the next frequency */
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if (cpufreq_frequency_table_target
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(policy, freq_table, target_freq, relation, &idx)) {
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if (cpufreq_frequency_table_target(policy, freq_table, target_freq,
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relation, &idx))
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return -EINVAL;
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}
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freqs.old = policy->cur;
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freqs.new = freq_table[idx].frequency;
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@ -60,9 +60,12 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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/* update armss clk frequency */
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if (clk_set_rate(armss_clk, freq_table[idx].frequency * 1000)) {
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pr_err("db8500-cpufreq: Failed to update armss clk\n");
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return -EINVAL;
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ret = clk_set_rate(armss_clk, freqs.new * 1000);
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if (ret) {
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pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n",
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freqs.new * 1000, ret);
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return ret;
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}
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/* post change notification */
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@ -72,7 +75,7 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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return 0;
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}
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static unsigned int db8500_cpufreq_getspeed(unsigned int cpu)
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static unsigned int dbx500_cpufreq_getspeed(unsigned int cpu)
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{
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int i = 0;
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unsigned long freq = clk_get_rate(armss_clk) / 1000;
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@ -84,40 +87,26 @@ static unsigned int db8500_cpufreq_getspeed(unsigned int cpu)
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}
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/* We could not find a corresponding frequency. */
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pr_err("db8500-cpufreq: Failed to find cpufreq speed\n");
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pr_err("dbx500-cpufreq: Failed to find cpufreq speed\n");
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return 0;
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}
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static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy)
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static int __cpuinit dbx500_cpufreq_init(struct cpufreq_policy *policy)
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{
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int i = 0;
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int res;
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armss_clk = clk_get(NULL, "armss");
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if (IS_ERR(armss_clk)) {
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pr_err("db8500-cpufreq : Failed to get armss clk\n");
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return PTR_ERR(armss_clk);
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}
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pr_info("db8500-cpufreq : Available frequencies:\n");
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while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
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pr_info(" %d Mhz\n", freq_table[i].frequency/1000);
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i++;
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}
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/* get policy fields based on the table */
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res = cpufreq_frequency_table_cpuinfo(policy, freq_table);
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if (!res)
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cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
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else {
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pr_err("db8500-cpufreq : Failed to read policy table\n");
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clk_put(armss_clk);
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pr_err("dbx500-cpufreq: Failed to read policy table\n");
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return res;
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}
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policy->min = policy->cpuinfo.min_freq;
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policy->max = policy->cpuinfo.max_freq;
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policy->cur = db8500_cpufreq_getspeed(policy->cpu);
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policy->cur = dbx500_cpufreq_getspeed(policy->cpu);
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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/*
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@ -135,45 +124,57 @@ static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy)
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return 0;
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}
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static struct cpufreq_driver db8500_cpufreq_driver = {
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.flags = CPUFREQ_STICKY,
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.verify = db8500_cpufreq_verify_speed,
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.target = db8500_cpufreq_target,
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.get = db8500_cpufreq_getspeed,
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.init = db8500_cpufreq_init,
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.name = "DB8500",
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.attr = db8500_cpufreq_attr,
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static struct cpufreq_driver dbx500_cpufreq_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS,
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.verify = dbx500_cpufreq_verify_speed,
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.target = dbx500_cpufreq_target,
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.get = dbx500_cpufreq_getspeed,
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.init = dbx500_cpufreq_init,
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.name = "DBX500",
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.attr = dbx500_cpufreq_attr,
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};
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static int db8500_cpufreq_probe(struct platform_device *pdev)
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static int dbx500_cpufreq_probe(struct platform_device *pdev)
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{
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freq_table = dev_get_platdata(&pdev->dev);
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int i = 0;
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freq_table = dev_get_platdata(&pdev->dev);
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if (!freq_table) {
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pr_err("db8500-cpufreq: Failed to fetch cpufreq table\n");
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pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n");
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return -ENODEV;
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}
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return cpufreq_register_driver(&db8500_cpufreq_driver);
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armss_clk = clk_get(&pdev->dev, "armss");
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if (IS_ERR(armss_clk)) {
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pr_err("dbx500-cpufreq: Failed to get armss clk\n");
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return PTR_ERR(armss_clk);
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}
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pr_info("dbx500-cpufreq: Available frequencies:\n");
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while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
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pr_info(" %d Mhz\n", freq_table[i].frequency/1000);
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i++;
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}
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return cpufreq_register_driver(&dbx500_cpufreq_driver);
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}
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static struct platform_driver db8500_cpufreq_plat_driver = {
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static struct platform_driver dbx500_cpufreq_plat_driver = {
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.driver = {
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.name = "cpufreq-u8500",
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.name = "cpufreq-ux500",
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.owner = THIS_MODULE,
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},
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.probe = db8500_cpufreq_probe,
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.probe = dbx500_cpufreq_probe,
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};
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static int __init db8500_cpufreq_register(void)
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static int __init dbx500_cpufreq_register(void)
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{
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if (!cpu_is_u8500_family())
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return -ENODEV;
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pr_info("cpufreq for DB8500 started\n");
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return platform_driver_register(&db8500_cpufreq_plat_driver);
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return platform_driver_register(&dbx500_cpufreq_plat_driver);
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}
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device_initcall(db8500_cpufreq_register);
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device_initcall(dbx500_cpufreq_register);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("cpufreq driver for DB8500");
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MODULE_DESCRIPTION("cpufreq driver for DBX500");
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@ -3072,8 +3072,8 @@ static struct mfd_cell db8500_prcmu_devs[] = {
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.pdata_size = sizeof(db8500_regulators),
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},
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{
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.name = "cpufreq-u8500",
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.of_compatible = "stericsson,cpufreq-u8500",
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.name = "cpufreq-ux500",
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.of_compatible = "stericsson,cpufreq-ux500",
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.platform_data = &db8500_cpufreq_table,
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.pdata_size = sizeof(db8500_cpufreq_table),
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},
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