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Merge branch 'nfp-bpf-rename-ALU_OP_NEG-and-support-BPF_NEG'
Jakub Kicinski says: ==================== nfp: bpf: rename ALU_OP_NEG and support BPF_NEG Jiong says: Compilers are starting to use BPF_NEG, for example LLVM. However, NFP does not support JITing it. This patch set adds this. Unit test is added as well. Meanwhile, the current NFP_ALU_NEG is actually doing bitwise NOT (one's complement) operation, so the name is misleading. This patch set corrects this. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
9681ab0667
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@ -944,7 +944,7 @@ wrp_alu_imm(struct nfp_prog *nfp_prog, u8 dst, enum alu_op alu_op, u32 imm)
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if (alu_op == ALU_OP_XOR) {
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if (!~imm)
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emit_alu(nfp_prog, reg_both(dst), reg_none(),
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ALU_OP_NEG, reg_b(dst));
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ALU_OP_NOT, reg_b(dst));
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if (!imm || !~imm)
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return;
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}
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@ -1218,6 +1218,18 @@ static int sub_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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return 0;
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}
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static int neg_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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{
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const struct bpf_insn *insn = &meta->insn;
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emit_alu(nfp_prog, reg_both(insn->dst_reg * 2), reg_imm(0),
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ALU_OP_SUB, reg_b(insn->dst_reg * 2));
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emit_alu(nfp_prog, reg_both(insn->dst_reg * 2 + 1), reg_imm(0),
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ALU_OP_SUB_C, reg_b(insn->dst_reg * 2 + 1));
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return 0;
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}
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static int shl_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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{
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const struct bpf_insn *insn = &meta->insn;
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@ -1338,6 +1350,16 @@ static int sub_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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return wrp_alu32_imm(nfp_prog, meta, ALU_OP_SUB, !meta->insn.imm);
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}
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static int neg_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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{
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u8 dst = meta->insn.dst_reg * 2;
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emit_alu(nfp_prog, reg_both(dst), reg_imm(0), ALU_OP_SUB, reg_b(dst));
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wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0);
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return 0;
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}
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static int shl_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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{
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const struct bpf_insn *insn = &meta->insn;
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@ -1847,6 +1869,7 @@ static const instr_cb_t instr_cb[256] = {
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[BPF_ALU64 | BPF_ADD | BPF_K] = add_imm64,
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[BPF_ALU64 | BPF_SUB | BPF_X] = sub_reg64,
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[BPF_ALU64 | BPF_SUB | BPF_K] = sub_imm64,
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[BPF_ALU64 | BPF_NEG] = neg_reg64,
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[BPF_ALU64 | BPF_LSH | BPF_K] = shl_imm64,
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[BPF_ALU64 | BPF_RSH | BPF_K] = shr_imm64,
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[BPF_ALU | BPF_MOV | BPF_X] = mov_reg,
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@ -1861,6 +1884,7 @@ static const instr_cb_t instr_cb[256] = {
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[BPF_ALU | BPF_ADD | BPF_K] = add_imm,
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[BPF_ALU | BPF_SUB | BPF_X] = sub_reg,
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[BPF_ALU | BPF_SUB | BPF_K] = sub_imm,
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[BPF_ALU | BPF_NEG] = neg_reg,
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[BPF_ALU | BPF_LSH | BPF_K] = shl_imm,
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[BPF_ALU | BPF_END | BPF_X] = end_reg32,
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[BPF_LD | BPF_IMM | BPF_DW] = imm_ld8,
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@ -174,7 +174,7 @@ enum shf_sc {
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enum alu_op {
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ALU_OP_NONE = 0x00,
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ALU_OP_ADD = 0x01,
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ALU_OP_NEG = 0x04,
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ALU_OP_NOT = 0x04,
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ALU_OP_AND = 0x08,
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ALU_OP_SUB_C = 0x0d,
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ALU_OP_ADD_C = 0x11,
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