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arm64: dts: qcom: sa8775p: enable the inline crypto engine

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Add an ICE node to sa8775p SoC description and enable it by adding a
phandle to the UFS node.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230913153529.32777-2-bartosz.golaszewski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Bartosz Golaszewski 2023-09-13 17:35:29 +02:00 committed by Bjorn Andersson
parent e3c6386c6a
commit 96272ba710
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/qcom/sa8775p.dtsi
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@ -1525,6 +1525,7 @@ ufs_mem_hc: ufs@1d84000 {
<0 0>,
<0 0>,
<0 0>;
qcom,ice = <&ice>;
status = "disabled";
};
@ -1546,6 +1547,13 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
ice: crypto@1d88000 {
compatible = "qcom,sa8775p-inline-crypto-engine",
"qcom,inline-crypto-engine";
reg = <0x0 0x01d88000 0x0 0x8000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
};
usb_0_hsphy: phy@88e4000 {
compatible = "qcom,sa8775p-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";