drm/xe/sriov: Disable SR-IOV if primary GT is disabled via configfs

SR-IOV operation relies on the primary GT's GuC to operate (in both PF
and VF mode).  Don't enable the .has_sriov flag if the primary-GT was
disabled by configfs.

v2:
 - Move handling to xe_info_init().  (Michal)

v3:
 - Just update the .has_sriov flag in xe_info_init_early().  (Michal)

v4:
 - Drop unnecessary comment.  (Michal)
 - Flip condition order for consistency with other checks.  (Michal)

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://lore.kernel.org/r/20251013200944.2499947-48-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
This commit is contained in:
Matt Roper 2025-10-13 13:10:06 -07:00
parent 7abd69278b
commit 961a7582b1

View File

@ -629,7 +629,8 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.has_late_bind = desc->has_late_bind;
xe->info.has_llc = desc->has_llc;
xe->info.has_pxp = desc->has_pxp;
xe->info.has_sriov = desc->has_sriov;
xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
desc->has_sriov;
xe->info.skip_guc_pc = desc->skip_guc_pc;
xe->info.skip_mtcfg = desc->skip_mtcfg;
xe->info.skip_pcode = desc->skip_pcode;