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drm/amd/display: [FW Promotion] Release 0.1.12.0

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Add dmub command to support LSDMA

Acked-by: ChiaHsuan Chung <chiahsuan.chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Taimur Hassan 2025-05-18 11:28:38 -04:00 committed by Alex Deucher
parent 56f618407d
commit 960d8c0fa3
1 changed files with 156 additions and 0 deletions
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156
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
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@ -1516,6 +1516,11 @@ enum dmub_cmd_type {
*/
DMUB_CMD__FUSED_IO = 89,
/**
* Command type used for all LSDMA commands.
*/
DMUB_CMD__LSDMA = 90,
DMUB_CMD__VBIOS = 128,
};
@ -1926,6 +1931,121 @@ struct dmub_rb_cmd_fams2_flip {
struct dmub_fams2_flip_info flip_info;
};
struct dmub_cmd_lsdma_data {
union {
struct lsdma_init_data {
union dmub_addr gpu_addr_base;
uint32_t ring_size;
} init_data;
struct lsdma_tiled_copy_data {
uint32_t src_addr_lo;
uint32_t src_addr_hi;
uint32_t dst_addr_lo;
uint32_t dst_addr_hi;
uint32_t src_x : 16;
uint32_t src_y : 16;
uint32_t src_width : 16;
uint32_t src_height : 16;
uint32_t dst_x : 16;
uint32_t dst_y : 16;
uint32_t dst_width : 16;
uint32_t dst_height : 16;
uint32_t rect_x : 16;
uint32_t rect_y : 16;
uint32_t src_swizzle_mode : 5;
uint32_t src_mip_max : 5;
uint32_t src_mip_id : 5;
uint32_t dst_mip_max : 5;
uint32_t dst_swizzle_mode : 5;
uint32_t dst_mip_id : 5;
uint32_t tmz : 1;
uint32_t dcc : 1;
uint32_t data_format : 6;
uint32_t padding1 : 4;
uint32_t dst_element_size : 3;
uint32_t num_type : 3;
uint32_t src_element_size : 3;
uint32_t write_compress : 2;
uint32_t cache_policy_dst : 2;
uint32_t cache_policy_src : 2;
uint32_t read_compress : 2;
uint32_t src_dim : 2;
uint32_t dst_dim : 2;
uint32_t max_uncom : 1;
uint32_t max_com : 2;
uint32_t padding : 30;
} tiled_copy_data;
struct lsdma_linear_copy_data {
uint32_t count : 30;
uint32_t cache_policy_dst : 2;
uint32_t tmz : 1;
uint32_t cache_policy_src : 2;
uint32_t padding : 29;
uint32_t src_lo;
uint32_t src_hi;
uint32_t dst_lo;
uint32_t dst_hi;
} linear_copy_data;
struct lsdma_reg_write_data {
uint32_t reg_addr;
uint32_t reg_data;
} reg_write_data;
struct lsdma_pio_copy_data {
union {
struct {
uint32_t byte_count : 26;
uint32_t src_loc : 1;
uint32_t dst_loc : 1;
uint32_t src_addr_inc : 1;
uint32_t dst_addr_inc : 1;
uint32_t overlap_disable : 1;
uint32_t constant_fill : 1;
} fields;
uint32_t raw;
} packet;
uint32_t src_lo;
uint32_t src_hi;
uint32_t dst_lo;
uint32_t dst_hi;
} pio_copy_data;
struct lsdma_pio_constfill_data {
union {
struct {
uint32_t byte_count : 26;
uint32_t src_loc : 1;
uint32_t dst_loc : 1;
uint32_t src_addr_inc : 1;
uint32_t dst_addr_inc : 1;
uint32_t overlap_disable : 1;
uint32_t constant_fill : 1;
} fields;
uint32_t raw;
} packet;
uint32_t dst_lo;
uint32_t dst_hi;
uint32_t data;
} pio_constfill_data;
uint32_t all[14];
} u;
};
struct dmub_rb_cmd_lsdma {
struct dmub_cmd_header header;
struct dmub_cmd_lsdma_data lsdma_data;
};
struct dmub_optc_state_v2 {
uint32_t v_total_min;
uint32_t v_total_max;
@ -4453,6 +4573,37 @@ enum dmub_cmd_abm_type {
DMUB_CMD__ABM_GET_HISTOGRAM_DATA = 11,
};
/**
* LSDMA command sub-types.
*/
enum dmub_cmd_lsdma_type {
/**
* Initialize parameters for LSDMA.
* Ring buffer is mapped to the ring buffer
*/
DMUB_CMD__LSDMA_INIT_CONFIG = 0,
/**
* LSDMA copies data from source to destination linearly
*/
DMUB_CMD__LSDMA_LINEAR_COPY = 1,
/**
* Send the tiled-to-tiled copy command
*/
DMUB_CMD__LSDMA_TILED_TO_TILED_COPY = 2,
/**
* Send the poll reg write command
*/
DMUB_CMD__LSDMA_POLL_REG_WRITE = 3,
/**
* Send the pio copy command
*/
DMUB_CMD__LSDMA_PIO_COPY = 4,
/**
* Send the pio constfill command
*/
DMUB_CMD__LSDMA_PIO_CONSTFILL = 5,
};
struct abm_ace_curve {
/**
* @offsets: ACE curve offsets.
@ -5973,6 +6124,11 @@ union dmub_rb_cmd {
struct dmub_rb_cmd_fams2_flip fams2_flip;
struct dmub_rb_cmd_fused_io fused_io;
/**
* Definition of a DMUB_CMD__LSDMA command.
*/
struct dmub_rb_cmd_lsdma lsdma;
};
/**