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arm64: dts: rockchip: rk3568: add pwm interrupt

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Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: Ie330a1cc111d1f9f9cbedc7f123e06b31518fa5a
This commit is contained in:
Steven Liu 2021-03-12 11:46:07 +08:00 committed by Tao Huang
parent 4c59d5d2ae
commit 95c92f0df0
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@ -927,6 +927,8 @@ pwm2: pwm@fdd70020 {
pwm3: pwm@fdd70030 {
compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xfdd70030 0x0 0x10>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pins>;
@ -2923,6 +2925,8 @@ pwm6: pwm@fe6e0020 {
pwm7: pwm@fe6e0030 {
compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xfe6e0030 0x0 0x10>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm7_pins>;
@ -2967,6 +2971,8 @@ pwm10: pwm@fe6f0020 {
pwm11: pwm@fe6f0030 {
compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xfe6f0030 0x0 0x10>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm11m0_pins>;
@ -3011,6 +3017,8 @@ pwm14: pwm@fe700020 {
pwm15: pwm@fe700030 {
compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xfe700030 0x0 0x10>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm15m0_pins>;