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arm64: allwinner: h6: restore the usage of CCU slice macros

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As the definition of CCU slice macros are already merged into the source
tree, restore the usage of the macros now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Icenowy Zheng 2018-04-03 21:40:24 +08:00 committed by Maxime Ripard
parent 60cc43fc88
commit 95beb93d70
1 changed files with 11 additions and 9 deletions
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20
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@ -4,6 +4,8 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
/ {
interrupt-parent = <&gic>;
@ -115,7 +117,7 @@ pio: pinctrl@300b000 {
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu 26>, <&osc24M>, <&osc32k>;
clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@ -134,8 +136,8 @@ uart0: serial@5000000 {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu 70>;
resets = <&ccu 21>;
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
@ -145,8 +147,8 @@ uart1: serial@5000400 {
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu 71>;
resets = <&ccu 22>;
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
@ -156,8 +158,8 @@ uart2: serial@5000800 {
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu 72>;
resets = <&ccu 23>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
status = "disabled";
};
@ -167,8 +169,8 @@ uart3: serial@5000c00 {
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu 73>;
resets = <&ccu 24>;
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
status = "disabled";
};
};