This pull request contains Broadcom ARM64-based SoCs DT changes for

6.20, please pull the following:
 
 - Peter enables the RNG on 2712 (Raspberry Pi 5)
 
 - Stanimir adds the watchdog DT node on 2712
 
 - Rob removes undocumneted nodes, reworks clock nodes, fixes the
   "simple-bus" node names, and cleans up additional properties and nodes
   for all Broadcom ARM64-based SoCs
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmlxS/AACgkQh9CWnEQH
 BwRNrA/+I+5GNj06qVBpUFY5W7xbsyhfLJnCfWzTl70Z8zSxIlb7oshSEMDXcgS9
 eFkOSAfbLCR+qD+A/jQYLmGs4Aq8PL/7CcFAYGHAHAKXf9eTLsY4aRvXsVvxdG1O
 ACRo/B2NxQ5GpUae0kN+I3oRWkJNsSMp6yIa3MGViFwQ8uR8SZMEzEMOJQ180vrq
 aqcoRpzrkn/pzxVSEReofdaodg0f1NCA6zkig35uMZB1wMWd7F1EgERx6dUYLnjX
 AwqTM08uwcVE8L538FgMaQFHUnmJVZQaxBwm2CdWI9VpEuBbODPLDV4n5wmhxV+i
 +7bRovIwriEd5fLlhnqBRgQYDeUxFhaoDEMH4AROx89xCsgvvYAtPyazODFVXTYq
 3zETqE352IAAdofeEqvQKb1KIP9YvzFTBJxIC1DuyiZVZ2pGxFrrpHV2GHxAyAjc
 jCGNs3QQYPL24HJkkuqtch7yMjA18WLTiKT+6NmdNmnlrFELt2at8QAnWR5EzYiK
 V6i6ac38kKiOlgKuuEkJtMvmYILefRQXH3p5w1D7HGQ6Hz6JrgP+Vrfxi5B/pMH9
 eyJyr/c0GEJH0pvHcKkaeWKv9swCXALk6GIrcC88D0Tefxgd1yFBBhOu6tRMu/87
 8mbWEfJIRzgqOzdkv/jENmRveGNY3fVZaxScQfvP+GWi5p/47eA=
 =Hjv8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SMAACgkQmmx57+YA
 GNn9/g/+KXB0vvCklipVb9uwmYGeZfqR4ndmsN3/gu8HW/sryFXwSiCosm64gnd5
 RIGDu+iYWwI51N4J7cZo1MsYG5Bjw+xjwZVazY5kavU5tgyYipr3YH1ypgi7fVuF
 J3vV231R5Hp+LPgsTFMlaMxqgYplCNccNVN3Cb+mxghaxGJQfeetagOUmcIwpOqz
 3qKK60ecHxbEtNUtXlyPx9MoQftcWEZ5GgKgycicoskxHjzRpx1DHead6+rDcQ6Q
 4fBcZR1Ldyw8kMTctRh4dO1Ce1z0qTs1HA3bLDlW0ppO2yMf3KDfNv3CwpVvErLk
 FrpmtnFyRn0waBgksjxFe2nP3mUG8y1BS7g3Id60Jfi95GcHZU0D3qvizJxK0yzv
 PXxoUS7wGERFvOkw8+ibgoPPFODsQkE0tWWm1cnvjFO4BLauZ2SccSdE9rN6MmSu
 qtP7Wl3crhB9X+sfNndmHwNrJ29TQS5ddB2TKmgnvNhmdsEhr9fKvNGYBCWY54jE
 xqqb55qlfRW3IB0fg78ugaw6X2ZVZMCsm58KwC0oKGiwCJdKTmHJxx8zrNh7Bvc1
 qrS0dyysRVjvvUHLUhWZUvGvbs6q9c/votb5MbyMoDk1h1yDGw3TpAQf4CJWnXrQ
 gm3SXM3YNIPn1GDeFxCdAKC3qniLeACKCHOZYKR272jiWRBmdEo=
 =n3rD
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-6.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs DT changes for
6.20, please pull the following:

- Peter enables the RNG on 2712 (Raspberry Pi 5)

- Stanimir adds the watchdog DT node on 2712

- Rob removes undocumneted nodes, reworks clock nodes, fixes the
  "simple-bus" node names, and cleans up additional properties and nodes
  for all Broadcom ARM64-based SoCs

* tag 'arm-soc/for-6.20/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcm4906-netgear-r8000p: Drop unnecessary "ranges" in partition node
  arm64: dts: broadcom: northstar2: Drop "arm,cci-400-pmu" fallback compatible
  arm64: dts: broadcom: northstar2: Drop QSPI "clock-names"
  arm64: dts: broadcom: northstar2: Drop unused and undocumented "brcm,pcie-ob-oarr-size" properties
  arm64: dts: broadcom: northstar2: Rework clock nodes
  arm64: dts: broadcom: ns2-svk: Use non-deprecated at25 properties
  arm64: dts: broadcom: Use preferred node names
  arm64: dts: broadcom: stingray: Move raid nodes out of bus
  arm64: dts: broadcom: stingray: Fix 'simple-bus' node names
  arm64: dts: broadcom: stingray: Rework clock nodes
  arm64: dts: broadcom: Remove unused and undocumented nodes
  arm64: dts: broadcom: bcm2712: Add watchdog DT node
  arm64: dts: broadcom: bcm2712: Enable RNG

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-01-28 18:34:53 +01:00
commit 9587fe4928
12 changed files with 283 additions and 427 deletions

View File

@ -146,9 +146,6 @@ partitions {
partition@0 {
label = "cferom";
reg = <0x0 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x100000>;
nvmem-layout {
compatible = "fixed-layout";

View File

@ -1,105 +0,0 @@
/*
* BSD LICENSE
*
* Copyright (c) 2016 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/clock/bcm-ns2.h>
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
lcpll_ddr: lcpll_ddr@6501d058 {
#clock-cells = <1>;
compatible = "brcm,ns2-lcpll-ddr";
reg = <0x6501d058 0x20>,
<0x6501c020 0x4>,
<0x6501d04c 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll_ddr", "pcie_sata_usb",
"ddr", "ddr_ch2_unused",
"ddr_ch3_unused", "ddr_ch4_unused",
"ddr_ch5_unused";
};
lcpll_ports: lcpll_ports@6501d078 {
#clock-cells = <1>;
compatible = "brcm,ns2-lcpll-ports";
reg = <0x6501d078 0x20>,
<0x6501c020 0x4>,
<0x6501d054 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll_ports", "wan", "rgmii",
"ports_ch2_unused",
"ports_ch3_unused",
"ports_ch4_unused",
"ports_ch5_unused";
};
genpll_scr: genpll_scr@6501d098 {
#clock-cells = <1>;
compatible = "brcm,ns2-genpll-scr";
reg = <0x6501d098 0x32>,
<0x6501c020 0x4>,
<0x6501d044 0x4>;
clocks = <&osc>;
clock-output-names = "genpll_scr", "scr", "fs",
"audio_ref", "scr_ch3_unused",
"scr_ch4_unused", "scr_ch5_unused";
};
iprocmed: iprocmed {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
clock-div = <2>;
clock-mult = <1>;
};
iprocslow: iprocslow {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
clock-div = <4>;
clock-mult = <1>;
};
genpll_sw: genpll_sw@6501d0c4 {
#clock-cells = <1>;
compatible = "brcm,ns2-genpll-sw";
reg = <0x6501d0c4 0x32>,
<0x6501c020 0x4>,
<0x6501d044 0x4>;
clocks = <&osc>;
clock-output-names = "genpll_sw", "rpe", "250", "nic",
"chimp", "port", "sdio";
};

View File

@ -106,34 +106,18 @@ &uart3 {
&ssp0 {
status = "okay";
slic@0 {
compatible = "silabs,si3226x";
reg = <0>;
spi-max-frequency = <5000000>;
spi-cpha;
spi-cpol;
pl022,interface = <0>;
pl022,slave-tx-disable = <0>;
pl022,com-mode = <0>;
pl022,rx-level-trig = <1>;
pl022,tx-level-trig = <1>;
pl022,ctrl-len = <11>;
pl022,wait-state = <0>;
pl022,duplex = <0>;
};
};
&ssp1 {
status = "okay";
at25@0 {
eeprom@0 {
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <5000000>;
at25,byte-len = <0x8000>;
at25,addr-mode = <2>;
at25,page-size = <64>;
size = <0x8000>;
address-width = <16>;
pagesize = <64>;
spi-cpha;
spi-cpol;
pl022,interface = <0>;
@ -167,7 +151,7 @@ &sdio1 {
};
&nand {
nandcs@0 {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-mode = "hw";

View File

@ -74,7 +74,7 @@ gphy0: eth-phy@10 {
};
&nand {
nandcs@0 {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-mode = "hw";

View File

@ -113,6 +113,28 @@ pmu {
<&A57_3>;
};
osc: clock-25000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
iprocmed: iprocmed {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
clock-div = <2>;
clock-mult = <1>;
};
iprocslow: iprocslow {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
clock-div = <4>;
clock-mult = <1>;
};
pcie0: pcie@20020000 {
compatible = "brcm,iproc-pcie";
reg = <0 0x20020000 0 0x1000>;
@ -132,7 +154,6 @@ pcie0: pcie@20020000 {
ranges = <0x83000000 0 0x00000000 0 0x00000000 0 0x20000000>;
brcm,pcie-ob;
brcm,pcie-ob-oarr-size;
brcm,pcie-ob-axi-offset = <0x00000000>;
status = "disabled";
@ -162,7 +183,6 @@ pcie4: pcie@50020000 {
ranges = <0x83000000 0 0x00000000 0 0x30000000 0 0x20000000>;
brcm,pcie-ob;
brcm,pcie-ob-oarr-size;
brcm,pcie-ob-axi-offset = <0x30000000>;
status = "disabled";
@ -197,8 +217,6 @@ soc: soc {
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
#include "ns2-clock.dtsi"
enet: ethernet@61000000 {
compatible = "brcm,ns2-amac";
reg = <0x61000000 0x1000>,
@ -334,6 +352,55 @@ smmu: iommu@64000000 {
#iommu-cells = <1>;
};
lcpll_ddr: clock-controller@6501d058 {
#clock-cells = <1>;
compatible = "brcm,ns2-lcpll-ddr";
reg = <0x6501d058 0x20>,
<0x6501c020 0x4>,
<0x6501d04c 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll_ddr", "pcie_sata_usb",
"ddr", "ddr_ch2_unused",
"ddr_ch3_unused", "ddr_ch4_unused",
"ddr_ch5_unused";
};
lcpll_ports: clock-controller@6501d078 {
#clock-cells = <1>;
compatible = "brcm,ns2-lcpll-ports";
reg = <0x6501d078 0x20>,
<0x6501c020 0x4>,
<0x6501d054 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll_ports", "wan", "rgmii",
"ports_ch2_unused",
"ports_ch3_unused",
"ports_ch4_unused",
"ports_ch5_unused";
};
genpll_scr: clock-controller@6501d098 {
#clock-cells = <1>;
compatible = "brcm,ns2-genpll-scr";
reg = <0x6501d098 0x32>,
<0x6501c020 0x4>,
<0x6501d044 0x4>;
clocks = <&osc>;
clock-output-names = "genpll_scr", "scr", "fs",
"audio_ref", "scr_ch3_unused",
"scr_ch4_unused", "scr_ch5_unused";
};
genpll_sw: clock-controller@6501d0c4 {
#clock-cells = <1>;
compatible = "brcm,ns2-genpll-sw";
reg = <0x6501d0c4 0x32>,
<0x6501c020 0x4>,
<0x6501d044 0x4>;
clocks = <&osc>;
clock-output-names = "genpll_sw", "rpe", "250", "nic",
"chimp", "port", "sdio";
};
pinctrl: pinctrl@6501d130 {
compatible = "brcm,ns2-pinmux";
reg = <0x6501d130 0x08>,
@ -438,8 +505,7 @@ cci@65590000 {
ranges = <0 0x65590000 0x10000>;
pmu@9000 {
compatible = "arm,cci-400-pmu,r1",
"arm,cci-400-pmu";
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x4000>;
interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
@ -657,7 +723,7 @@ hwrng: hwrng@66220000 {
reg = <0x66220000 0x28>;
};
sata_phy: sata_phy@663f0100 {
sata_phy: sata-phy@663f0100 {
compatible = "brcm,iproc-ns2-sata-phy";
reg = <0x663f0100 0x1f00>,
<0x663f004c 0x10>;
@ -701,7 +767,7 @@ sata1: sata-port@1 {
};
};
sdio0: sdhci@66420000 {
sdio0: mmc@66420000 {
compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x66420000 0x100>;
interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
@ -711,7 +777,7 @@ sdio0: sdhci@66420000 {
status = "disabled";
};
sdio1: sdhci@66430000 {
sdio1: mmc@66430000 {
compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x66430000 0x100>;
interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
@ -721,7 +787,7 @@ sdio1: sdhci@66430000 {
status = "disabled";
};
nand: nand@66460000 {
nand: nand-controller@66460000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x66460000 0x600>,
<0x67015408 0x600>,
@ -746,7 +812,6 @@ qspi: spi@66470200 {
interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "spi_l1_intr";
clocks = <&iprocmed>;
clock-names = "iprocmed";
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;

View File

@ -88,7 +88,7 @@ &enet {
&nand {
status = "okay";
nandcs@0 {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-mode = "hw";

View File

@ -1,182 +0,0 @@
/*
* BSD LICENSE
*
* Copyright(c) 2016-2017 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/clock/bcm-sr.h>
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
crmu_ref25m: crmu_ref25m {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&osc>;
clock-div = <2>;
clock-mult = <1>;
};
genpll0: genpll0@1d104 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll0";
reg = <0x0001d104 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll0", "clk_125m", "clk_scr",
"clk_250", "clk_pcie_axi",
"clk_paxc_axi_x2",
"clk_paxc_axi";
};
genpll2: genpll2@1d1ac {
#clock-cells = <1>;
compatible = "brcm,sr-genpll2";
reg = <0x0001d1ac 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll2", "clk_nic",
"clk_ts_500_ref", "clk_125_nitro",
"clk_chimp", "clk_nic_flash",
"clk_fs";
};
genpll3: genpll3@1d1e0 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll3";
reg = <0x0001d1e0 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll3", "clk_hsls",
"clk_sdio";
};
genpll4: genpll4@1d214 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll4";
reg = <0x0001d214 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll4", "clk_ccn",
"clk_tpiu_pll", "clk_noc",
"clk_chclk_fs4",
"clk_bridge_fscpu";
};
genpll5: genpll5@1d248 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll5";
reg = <0x0001d248 0x32>,
<0x0001c870 0x4>;
clocks = <&osc>;
clock-output-names = "genpll5", "clk_fs4_hf",
"clk_crypto_ae", "clk_raid_ae";
};
lcpll0: lcpll0@1d0c4 {
#clock-cells = <1>;
compatible = "brcm,sr-lcpll0";
reg = <0x0001d0c4 0x3c>,
<0x0001c870 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll0", "clk_sata_refp",
"clk_sata_refn", "clk_sata_350",
"clk_sata_500";
};
lcpll1: lcpll1@1d138 {
#clock-cells = <1>;
compatible = "brcm,sr-lcpll1";
reg = <0x0001d138 0x3c>,
<0x0001c870 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll1", "clk_wan",
"clk_usb_ref",
"clk_crmu_ts";
};
hsls_clk: hsls_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 1>;
clock-div = <1>;
clock-mult = <1>;
};
hsls_div2_clk: hsls_div2_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>;
clock-div = <2>;
clock-mult = <1>;
};
hsls_div4_clk: hsls_div4_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>;
clock-div = <4>;
clock-mult = <1>;
};
hsls_25m_clk: hsls_25m_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&crmu_ref25m>;
clock-div = <1>;
clock-mult = <1>;
};
hsls_25m_div2_clk: hsls_25m_div2_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&hsls_25m_clk>;
clock-div = <2>;
clock-mult = <1>;
};
sdio0_clk: sdio0_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>;
clock-div = <1>;
clock-mult = <1>;
};
sdio1_clk: sdio1_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>;
clock-div = <1>;
clock-mult = <1>;
};

View File

@ -30,7 +30,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
fs4: fs4 {
fs4: fs4-bus@67000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -51,68 +51,68 @@ raid_mbox: raid_mbox@400000 {
msi-parent = <&gic_its 0x4300>;
#mbox-cells = <3>;
};
raid0: raid@0 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 0 0x1 0xff00>,
<&raid_mbox 1 0x1 0xff00>,
<&raid_mbox 2 0x1 0xff00>,
<&raid_mbox 3 0x1 0xff00>;
};
raid1: raid@1 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 4 0x1 0xff00>,
<&raid_mbox 5 0x1 0xff00>,
<&raid_mbox 6 0x1 0xff00>,
<&raid_mbox 7 0x1 0xff00>;
};
raid2: raid@2 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 8 0x1 0xff00>,
<&raid_mbox 9 0x1 0xff00>,
<&raid_mbox 10 0x1 0xff00>,
<&raid_mbox 11 0x1 0xff00>;
};
raid3: raid@3 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 12 0x1 0xff00>,
<&raid_mbox 13 0x1 0xff00>,
<&raid_mbox 14 0x1 0xff00>,
<&raid_mbox 15 0x1 0xff00>;
};
raid4: raid@4 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 16 0x1 0xff00>,
<&raid_mbox 17 0x1 0xff00>,
<&raid_mbox 18 0x1 0xff00>,
<&raid_mbox 19 0x1 0xff00>;
};
raid5: raid@5 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 20 0x1 0xff00>,
<&raid_mbox 21 0x1 0xff00>,
<&raid_mbox 22 0x1 0xff00>,
<&raid_mbox 23 0x1 0xff00>;
};
raid6: raid@6 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 24 0x1 0xff00>,
<&raid_mbox 25 0x1 0xff00>,
<&raid_mbox 26 0x1 0xff00>,
<&raid_mbox 27 0x1 0xff00>;
};
raid7: raid@7 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 28 0x1 0xff00>,
<&raid_mbox 29 0x1 0xff00>,
<&raid_mbox 30 0x1 0xff00>,
<&raid_mbox 31 0x1 0xff00>;
};
};
raid0: raid-0 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 0 0x1 0xff00>,
<&raid_mbox 1 0x1 0xff00>,
<&raid_mbox 2 0x1 0xff00>,
<&raid_mbox 3 0x1 0xff00>;
};
raid1: raid-1 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 4 0x1 0xff00>,
<&raid_mbox 5 0x1 0xff00>,
<&raid_mbox 6 0x1 0xff00>,
<&raid_mbox 7 0x1 0xff00>;
};
raid2: raid-2 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 8 0x1 0xff00>,
<&raid_mbox 9 0x1 0xff00>,
<&raid_mbox 10 0x1 0xff00>,
<&raid_mbox 11 0x1 0xff00>;
};
raid3: raid-3 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 12 0x1 0xff00>,
<&raid_mbox 13 0x1 0xff00>,
<&raid_mbox 14 0x1 0xff00>,
<&raid_mbox 15 0x1 0xff00>;
};
raid4: raid-4 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 16 0x1 0xff00>,
<&raid_mbox 17 0x1 0xff00>,
<&raid_mbox 18 0x1 0xff00>,
<&raid_mbox 19 0x1 0xff00>;
};
raid5: raid-5 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 20 0x1 0xff00>,
<&raid_mbox 21 0x1 0xff00>,
<&raid_mbox 22 0x1 0xff00>,
<&raid_mbox 23 0x1 0xff00>;
};
raid6: raid-6 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 24 0x1 0xff00>,
<&raid_mbox 25 0x1 0xff00>,
<&raid_mbox 26 0x1 0xff00>,
<&raid_mbox 27 0x1 0xff00>;
};
raid7: raid-7 {
compatible = "brcm,iproc-sba-v2";
mboxes = <&raid_mbox 28 0x1 0xff00>,
<&raid_mbox 29 0x1 0xff00>,
<&raid_mbox 30 0x1 0xff00>,
<&raid_mbox 31 0x1 0xff00>;
};

View File

@ -38,7 +38,7 @@ pcie8: pcie@60400000 {
phy-names = "pcie-phy";
};
pcie-ss {
pcie-ss-bus@40000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

View File

@ -32,7 +32,7 @@
#include <dt-bindings/pinctrl/brcm,pinctrl-stingray.h>
pinconf: pinconf@140000 {
pinconf: pinctrl@140000 {
compatible = "pinconf-single";
reg = <0x00140000 0x250>;
pinctrl-single,register-width = <32>;

View File

@ -2,7 +2,7 @@
/*
*Copyright(c) 2018 Broadcom
*/
usb {
usb-bus@68500000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -31,16 +31,6 @@ xhci0: usb@1000 {
status = "disabled";
};
bdc0: usb@2000 {
compatible = "brcm,bdc-v0.16";
reg = <0x0 0x00002000 0x0 0x1000>;
interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy0 0>, <&usbphy0 1>;
phy-names = "phy0", "phy1";
dma-coherent;
status = "disabled";
};
usbphy1: usb-phy@10000 {
compatible = "brcm,sr-usb-combo-phy";
reg = <0x0 0x00010000 0x0 0x100>;
@ -65,13 +55,4 @@ xhci1: usb@11000 {
status = "disabled";
};
bdc1: usb@21000 {
compatible = "brcm,bdc-v0.16";
reg = <0x0 0x00021000 0x0 0x1000>;
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy2>;
phy-names = "phy0";
dma-coherent;
status = "disabled";
};
};

View File

@ -30,6 +30,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/clock/bcm-sr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
@ -159,7 +160,46 @@ mhb: syscon@60401000 {
reg = <0 0x60401000 0 0x38c>;
};
scr {
osc: clock-50000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
crmu_ref25m: hsls_25m_clk: clock-25000000 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&osc>;
clock-div = <2>;
clock-mult = <1>;
};
hsls_div2_clk: hsls_div2_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>;
clock-div = <2>;
clock-mult = <1>;
};
hsls_div4_clk: hsls_div4_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>;
clock-div = <4>;
clock-mult = <1>;
};
hsls_25m_div2_clk: clock-12500000 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&hsls_25m_clk>;
clock-div = <2>;
clock-mult = <1>;
};
scr-bus@61000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -263,14 +303,12 @@ smmu: iommu@3000000 {
};
};
crmu: crmu {
crmu: crmu-bus@66400000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x66400000 0x100000>;
#include "stingray-clock.dtsi"
otp: otp@1c400 {
compatible = "brcm,ocotp-v2";
reg = <0x0001c400 0x68>;
@ -283,6 +321,84 @@ cdru: syscon@1d000 {
reg = <0x0001d000 0x400>;
};
lcpll0: clock-controller@1d0c4 {
#clock-cells = <1>;
compatible = "brcm,sr-lcpll0";
reg = <0x0001d0c4 0x3c>,
<0x0001c870 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll0", "clk_sata_refp",
"clk_sata_refn", "clk_sata_350",
"clk_sata_500";
};
genpll0: clock-controller@1d104 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll0";
reg = <0x0001d104 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll0", "clk_125m", "clk_scr",
"clk_250", "clk_pcie_axi",
"clk_paxc_axi_x2",
"clk_paxc_axi";
};
lcpll1: clock-controller@1d138 {
#clock-cells = <1>;
compatible = "brcm,sr-lcpll1";
reg = <0x0001d138 0x3c>,
<0x0001c870 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll1", "clk_wan",
"clk_usb_ref",
"clk_crmu_ts";
};
genpll2: clock-controller@1d1ac {
#clock-cells = <1>;
compatible = "brcm,sr-genpll2";
reg = <0x0001d1ac 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll2", "clk_nic",
"clk_ts_500_ref", "clk_125_nitro",
"clk_chimp", "clk_nic_flash",
"clk_fs";
};
genpll3: clock-controller@1d1e0 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll3";
reg = <0x0001d1e0 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll3", "clk_hsls",
"clk_sdio";
};
genpll4: clock-controller@1d214 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll4";
reg = <0x0001d214 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll4", "clk_ccn",
"clk_tpiu_pll", "clk_noc",
"clk_chclk_fs4",
"clk_bridge_fscpu";
};
genpll5: clock-controller@1d248 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll5";
reg = <0x0001d248 0x32>,
<0x0001c870 0x4>;
clocks = <&osc>;
clock-output-names = "genpll5", "clk_fs4_hf",
"clk_crypto_ae", "clk_raid_ae";
};
gpio_crmu: gpio@24800 {
compatible = "brcm,iproc-gpio";
reg = <0x00024800 0x4c>;
@ -296,7 +412,7 @@ gpio_crmu: gpio@24800 {
#include "stingray-pcie.dtsi"
#include "stingray-usb.dtsi"
hsls {
hsls-bus@68900000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -575,7 +691,7 @@ enet: ethernet@340000 {
status = "disabled";
};
nand: nand@360000 {
nand: nand-controller@360000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x00360000 0x600>,
<0x0050a408 0x600>,
@ -588,28 +704,28 @@ nand: nand@360000 {
status = "disabled";
};
sdio0: sdhci@3f1000 {
sdio0: mmc@3f1000 {
compatible = "brcm,sdhci-iproc";
reg = <0x003f1000 0x100>;
interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <8>;
clocks = <&sdio0_clk>;
clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>;
iommus = <&smmu 0x6002 0x0000>;
status = "disabled";
};
sdio1: sdhci@3f2000 {
sdio1: mmc@3f2000 {
compatible = "brcm,sdhci-iproc";
reg = <0x003f2000 0x100>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <8>;
clocks = <&sdio1_clk>;
clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>;
iommus = <&smmu 0x6003 0x0000>;
status = "disabled";
};
};
tmons {
tmons-bus@8f100000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -698,18 +814,18 @@ cpu-crit {
};
};
nic-hsls {
nic-hsls-bus@60800000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x7fffffff>;
ranges = <0x0 0x0 0x60800000 0x6fffff>;
nic_i2c0: i2c@60826100 {
nic_i2c0: i2c@26100 {
compatible = "brcm,iproc-nic-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x60826100 0x100>,
<0x60e00408 0x1000>;
reg = <0x026100 0x100>,
<0x600408 0x1000>;
brcm,ape-hsls-addr-mask = <0x03400000>;
clock-frequency = <100000>;
status = "disabled";