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RDMA/erdma: Add erdma_modify_qp_rocev2() interface
The QP state machines in the RoCEv2 and iWARP protocols are different. To handle these differences for the erdma RoCEv2 device, we provide the erdma_modify_qp_rocev2() interface, which transitions the QP state and modifies QP attributes accordingly. Signed-off-by: Boshi Yu <boshiyu@linux.alibaba.com> Link: https://patch.msgid.link/20241211020930.68833-6-boshiyu@linux.alibaba.com Reviewed-by: Cheng Xu <chengyou@linux.alibaba.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Boshi Yu
Leon Romanovsky
parent
41dcaf48ff
commit
9566cf6a77
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@ -201,3 +201,48 @@ int erdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
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return npolled;
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}
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void erdma_remove_cqes_of_qp(struct ib_cq *ibcq, u32 qpn)
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{
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struct erdma_cq *cq = to_ecq(ibcq);
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struct erdma_cqe *cqe, *dst_cqe;
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u32 prev_cq_ci, cur_cq_ci;
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u32 ncqe = 0, nqp_cqe = 0;
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unsigned long flags;
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u8 owner;
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spin_lock_irqsave(&cq->kern_cq.lock, flags);
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prev_cq_ci = cq->kern_cq.ci;
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while (ncqe < cq->depth && (cqe = get_next_valid_cqe(cq)) != NULL) {
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++cq->kern_cq.ci;
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++ncqe;
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}
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while (ncqe > 0) {
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cur_cq_ci = prev_cq_ci + ncqe - 1;
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cqe = get_queue_entry(cq->kern_cq.qbuf, cur_cq_ci, cq->depth,
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CQE_SHIFT);
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if (be32_to_cpu(cqe->qpn) == qpn) {
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++nqp_cqe;
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} else if (nqp_cqe) {
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dst_cqe = get_queue_entry(cq->kern_cq.qbuf,
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cur_cq_ci + nqp_cqe,
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cq->depth, CQE_SHIFT);
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owner = FIELD_GET(ERDMA_CQE_HDR_OWNER_MASK,
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be32_to_cpu(dst_cqe->hdr));
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cqe->hdr = cpu_to_be32(
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(be32_to_cpu(cqe->hdr) &
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~ERDMA_CQE_HDR_OWNER_MASK) |
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FIELD_PREP(ERDMA_CQE_HDR_OWNER_MASK, owner));
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memcpy(dst_cqe, cqe, sizeof(*cqe));
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}
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--ncqe;
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}
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cq->kern_cq.ci = prev_cq_ci + nqp_cqe;
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spin_unlock_irqrestore(&cq->kern_cq.lock, flags);
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}
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@ -347,6 +347,20 @@ struct erdma_cmdq_modify_qp_req {
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u32 recv_nxt;
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};
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/* modify qp cfg1 for roce device */
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#define ERDMA_CMD_MODIFY_QP_DQPN_MASK GENMASK(19, 0)
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struct erdma_cmdq_mod_qp_req_rocev2 {
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u64 hdr;
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u32 cfg0;
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u32 cfg1;
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u32 attr_mask;
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u32 qkey;
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u32 rq_psn;
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u32 sq_psn;
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struct erdma_av_cfg av_cfg;
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};
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/* create qp cfg0 */
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#define ERDMA_CMD_CREATE_QP_SQ_DEPTH_MASK GENMASK(31, 20)
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#define ERDMA_CMD_CREATE_QP_QPN_MASK GENMASK(19, 0)
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@ -486,6 +486,7 @@ static const struct ib_device_ops erdma_device_ops_rocev2 = {
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.query_pkey = erdma_query_pkey,
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.create_ah = erdma_create_ah,
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.destroy_ah = erdma_destroy_ah,
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.modify_qp = erdma_modify_qp_rocev2,
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};
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static const struct ib_device_ops erdma_device_ops_iwarp = {
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@ -497,6 +498,7 @@ static const struct ib_device_ops erdma_device_ops_iwarp = {
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.iw_get_qp = erdma_get_ibqp,
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.iw_reject = erdma_reject,
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.iw_rem_ref = erdma_qp_put_ref,
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.modify_qp = erdma_modify_qp,
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};
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static const struct ib_device_ops erdma_device_ops = {
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@ -522,7 +524,6 @@ static const struct ib_device_ops erdma_device_ops = {
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.map_mr_sg = erdma_map_mr_sg,
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.mmap = erdma_mmap,
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.mmap_free = erdma_mmap_free,
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.modify_qp = erdma_modify_qp,
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.post_recv = erdma_post_recv,
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.post_send = erdma_post_send,
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.poll_cq = erdma_poll_cq,
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@ -186,6 +186,98 @@ int erdma_modify_qp_internal(struct erdma_qp *qp, struct erdma_qp_attrs *attrs,
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return ret;
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}
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static int modify_qp_cmd_rocev2(struct erdma_qp *qp,
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struct erdma_mod_qp_params_rocev2 *params,
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enum erdma_qpa_mask_rocev2 attr_mask)
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{
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struct erdma_cmdq_mod_qp_req_rocev2 req;
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memset(&req, 0, sizeof(req));
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erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
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CMDQ_OPCODE_MODIFY_QP);
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req.cfg0 = FIELD_PREP(ERDMA_CMD_MODIFY_QP_QPN_MASK, QP_ID(qp));
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if (attr_mask & ERDMA_QPA_ROCEV2_STATE)
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req.cfg0 |= FIELD_PREP(ERDMA_CMD_MODIFY_QP_STATE_MASK,
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params->state);
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if (attr_mask & ERDMA_QPA_ROCEV2_DST_QPN)
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req.cfg1 = FIELD_PREP(ERDMA_CMD_MODIFY_QP_DQPN_MASK,
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params->dst_qpn);
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if (attr_mask & ERDMA_QPA_ROCEV2_QKEY)
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req.qkey = params->qkey;
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if (attr_mask & ERDMA_QPA_ROCEV2_AV)
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erdma_set_av_cfg(&req.av_cfg, ¶ms->av);
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if (attr_mask & ERDMA_QPA_ROCEV2_SQ_PSN)
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req.sq_psn = params->sq_psn;
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if (attr_mask & ERDMA_QPA_ROCEV2_RQ_PSN)
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req.rq_psn = params->rq_psn;
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req.attr_mask = attr_mask;
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return erdma_post_cmd_wait(&qp->dev->cmdq, &req, sizeof(req), NULL,
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NULL);
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}
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static void erdma_reset_qp(struct erdma_qp *qp)
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{
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qp->kern_qp.sq_pi = 0;
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qp->kern_qp.sq_ci = 0;
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qp->kern_qp.rq_pi = 0;
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qp->kern_qp.rq_ci = 0;
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memset(qp->kern_qp.swr_tbl, 0, qp->attrs.sq_size * sizeof(u64));
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memset(qp->kern_qp.rwr_tbl, 0, qp->attrs.rq_size * sizeof(u64));
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memset(qp->kern_qp.sq_buf, 0, qp->attrs.sq_size << SQEBB_SHIFT);
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memset(qp->kern_qp.rq_buf, 0, qp->attrs.rq_size << RQE_SHIFT);
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erdma_remove_cqes_of_qp(&qp->scq->ibcq, QP_ID(qp));
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if (qp->rcq != qp->scq)
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erdma_remove_cqes_of_qp(&qp->rcq->ibcq, QP_ID(qp));
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}
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int erdma_modify_qp_state_rocev2(struct erdma_qp *qp,
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struct erdma_mod_qp_params_rocev2 *params,
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int attr_mask)
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{
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struct erdma_dev *dev = to_edev(qp->ibqp.device);
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int ret;
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ret = modify_qp_cmd_rocev2(qp, params, attr_mask);
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if (ret)
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return ret;
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if (attr_mask & ERDMA_QPA_ROCEV2_STATE)
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qp->attrs.rocev2.state = params->state;
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if (attr_mask & ERDMA_QPA_ROCEV2_QKEY)
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qp->attrs.rocev2.qkey = params->qkey;
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if (attr_mask & ERDMA_QPA_ROCEV2_DST_QPN)
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qp->attrs.rocev2.dst_qpn = params->dst_qpn;
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if (attr_mask & ERDMA_QPA_ROCEV2_AV)
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memcpy(&qp->attrs.rocev2.av, ¶ms->av,
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sizeof(struct erdma_av));
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if (rdma_is_kernel_res(&qp->ibqp.res) &&
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params->state == ERDMA_QPS_ROCEV2_RESET)
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erdma_reset_qp(qp);
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if (rdma_is_kernel_res(&qp->ibqp.res) &&
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params->state == ERDMA_QPS_ROCEV2_ERROR) {
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qp->flags |= ERDMA_QP_IN_FLUSHING;
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mod_delayed_work(dev->reflush_wq, &qp->reflush_dwork,
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usecs_to_jiffies(100));
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}
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return 0;
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}
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static void erdma_qp_safe_free(struct kref *ref)
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{
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struct erdma_qp *qp = container_of(ref, struct erdma_qp, ref);
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@ -121,7 +121,7 @@ static int create_qp_cmd(struct erdma_ucontext *uctx, struct erdma_qp *qp)
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err = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), &resp0,
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&resp1);
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if (!err)
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if (!err && erdma_device_iwarp(dev))
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qp->attrs.cookie =
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FIELD_GET(ERDMA_CMDQ_CREATE_QP_RESP_COOKIE_MASK, resp0);
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@ -1017,7 +1017,12 @@ int erdma_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *attrs,
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qp->attrs.max_send_sge = attrs->cap.max_send_sge;
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qp->attrs.max_recv_sge = attrs->cap.max_recv_sge;
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qp->attrs.state = ERDMA_QP_STATE_IDLE;
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if (erdma_device_iwarp(qp->dev))
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qp->attrs.state = ERDMA_QP_STATE_IDLE;
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else
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qp->attrs.rocev2.state = ERDMA_QPS_ROCEV2_RESET;
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INIT_DELAYED_WORK(&qp->reflush_dwork, erdma_flush_worker);
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ret = create_qp_cmd(uctx, qp);
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@ -1291,13 +1296,20 @@ int erdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
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struct erdma_dev *dev = to_edev(ibqp->device);
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struct erdma_ucontext *ctx = rdma_udata_to_drv_context(
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udata, struct erdma_ucontext, ibucontext);
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struct erdma_mod_qp_params_rocev2 rocev2_params;
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struct erdma_qp_attrs qp_attrs;
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int err;
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struct erdma_cmdq_destroy_qp_req req;
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down_write(&qp->state_lock);
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qp_attrs.state = ERDMA_QP_STATE_ERROR;
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erdma_modify_qp_internal(qp, &qp_attrs, ERDMA_QP_ATTR_STATE);
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if (erdma_device_iwarp(dev)) {
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qp_attrs.state = ERDMA_QP_STATE_ERROR;
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erdma_modify_qp_internal(qp, &qp_attrs, ERDMA_QP_ATTR_STATE);
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} else {
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rocev2_params.state = ERDMA_QPS_ROCEV2_ERROR;
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erdma_modify_qp_state_rocev2(qp, &rocev2_params,
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ERDMA_QPA_ROCEV2_STATE);
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}
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up_write(&qp->state_lock);
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cancel_delayed_work_sync(&qp->reflush_dwork);
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@ -1528,6 +1540,29 @@ void erdma_dealloc_ucontext(struct ib_ucontext *ibctx)
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atomic_dec(&dev->num_ctx);
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}
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static void erdma_attr_to_av(const struct rdma_ah_attr *ah_attr,
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struct erdma_av *av, u16 sport)
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{
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const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
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av->port = rdma_ah_get_port_num(ah_attr);
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av->sgid_index = grh->sgid_index;
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av->hop_limit = grh->hop_limit;
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av->traffic_class = grh->traffic_class;
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av->sl = rdma_ah_get_sl(ah_attr);
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av->flow_label = grh->flow_label;
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av->udp_sport = sport;
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ether_addr_copy(av->dmac, ah_attr->roce.dmac);
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memcpy(av->dgid, grh->dgid.raw, ERDMA_ROCEV2_GID_SIZE);
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if (ipv6_addr_v4mapped((struct in6_addr *)&grh->dgid))
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av->ntype = ERDMA_NETWORK_TYPE_IPV4;
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else
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av->ntype = ERDMA_NETWORK_TYPE_IPV6;
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}
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static int ib_qp_state_to_erdma_qp_state[IB_QPS_ERR + 1] = {
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[IB_QPS_RESET] = ERDMA_QP_STATE_IDLE,
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[IB_QPS_INIT] = ERDMA_QP_STATE_IDLE,
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@ -1538,6 +1573,140 @@ static int ib_qp_state_to_erdma_qp_state[IB_QPS_ERR + 1] = {
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[IB_QPS_ERR] = ERDMA_QP_STATE_ERROR
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};
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static int ib_qps_to_erdma_qps_rocev2[IB_QPS_ERR + 1] = {
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[IB_QPS_RESET] = ERDMA_QPS_ROCEV2_RESET,
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[IB_QPS_INIT] = ERDMA_QPS_ROCEV2_INIT,
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[IB_QPS_RTR] = ERDMA_QPS_ROCEV2_RTR,
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[IB_QPS_RTS] = ERDMA_QPS_ROCEV2_RTS,
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[IB_QPS_SQD] = ERDMA_QPS_ROCEV2_SQD,
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[IB_QPS_SQE] = ERDMA_QPS_ROCEV2_SQE,
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[IB_QPS_ERR] = ERDMA_QPS_ROCEV2_ERROR,
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};
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static int erdma_qps_to_ib_qps_rocev2[ERDMA_QPS_ROCEV2_COUNT] = {
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[ERDMA_QPS_ROCEV2_RESET] = IB_QPS_RESET,
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[ERDMA_QPS_ROCEV2_INIT] = IB_QPS_INIT,
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[ERDMA_QPS_ROCEV2_RTR] = IB_QPS_RTR,
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[ERDMA_QPS_ROCEV2_RTS] = IB_QPS_RTS,
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[ERDMA_QPS_ROCEV2_SQD] = IB_QPS_SQD,
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[ERDMA_QPS_ROCEV2_SQE] = IB_QPS_SQE,
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[ERDMA_QPS_ROCEV2_ERROR] = IB_QPS_ERR,
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};
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static int erdma_check_qp_attr_rocev2(struct erdma_qp *qp,
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struct ib_qp_attr *attr, int attr_mask)
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{
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enum ib_qp_state cur_state, nxt_state;
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struct erdma_dev *dev = qp->dev;
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int ret = -EINVAL;
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if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) {
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ret = -EOPNOTSUPP;
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goto out;
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}
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if ((attr_mask & IB_QP_PKEY_INDEX) &&
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attr->pkey_index >= ERDMA_MAX_PKEYS)
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goto out;
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if ((attr_mask & IB_QP_PORT) &&
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!rdma_is_port_valid(&dev->ibdev, attr->port_num))
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goto out;
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cur_state = (attr_mask & IB_QP_CUR_STATE) ?
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attr->cur_qp_state :
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erdma_qps_to_ib_qps_rocev2[qp->attrs.rocev2.state];
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nxt_state = (attr_mask & IB_QP_STATE) ? attr->qp_state : cur_state;
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if (!ib_modify_qp_is_ok(cur_state, nxt_state, qp->ibqp.qp_type,
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attr_mask))
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goto out;
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if ((attr_mask & IB_QP_AV) &&
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erdma_check_gid_attr(rdma_ah_read_grh(&attr->ah_attr)->sgid_attr))
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goto out;
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return 0;
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out:
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return ret;
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}
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static void erdma_init_mod_qp_params_rocev2(
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struct erdma_qp *qp, struct erdma_mod_qp_params_rocev2 *params,
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int *erdma_attr_mask, struct ib_qp_attr *attr, int ib_attr_mask)
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{
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enum erdma_qpa_mask_rocev2 to_modify_attrs = 0;
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enum erdma_qps_rocev2 cur_state, nxt_state;
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u16 udp_sport;
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if (ib_attr_mask & IB_QP_CUR_STATE)
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cur_state = ib_qps_to_erdma_qps_rocev2[attr->cur_qp_state];
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else
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cur_state = qp->attrs.rocev2.state;
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if (ib_attr_mask & IB_QP_STATE)
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nxt_state = ib_qps_to_erdma_qps_rocev2[attr->qp_state];
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else
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nxt_state = cur_state;
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to_modify_attrs |= ERDMA_QPA_ROCEV2_STATE;
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params->state = nxt_state;
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if (ib_attr_mask & IB_QP_QKEY) {
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to_modify_attrs |= ERDMA_QPA_ROCEV2_QKEY;
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params->qkey = attr->qkey;
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}
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if (ib_attr_mask & IB_QP_SQ_PSN) {
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to_modify_attrs |= ERDMA_QPA_ROCEV2_SQ_PSN;
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params->sq_psn = attr->sq_psn;
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}
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if (ib_attr_mask & IB_QP_RQ_PSN) {
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to_modify_attrs |= ERDMA_QPA_ROCEV2_RQ_PSN;
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params->rq_psn = attr->rq_psn;
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}
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if (ib_attr_mask & IB_QP_DEST_QPN) {
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to_modify_attrs |= ERDMA_QPA_ROCEV2_DST_QPN;
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params->dst_qpn = attr->dest_qp_num;
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}
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|
||||
if (ib_attr_mask & IB_QP_AV) {
|
||||
to_modify_attrs |= ERDMA_QPA_ROCEV2_AV;
|
||||
udp_sport = rdma_get_udp_sport(attr->ah_attr.grh.flow_label,
|
||||
QP_ID(qp), params->dst_qpn);
|
||||
erdma_attr_to_av(&attr->ah_attr, ¶ms->av, udp_sport);
|
||||
}
|
||||
|
||||
*erdma_attr_mask = to_modify_attrs;
|
||||
}
|
||||
|
||||
int erdma_modify_qp_rocev2(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
||||
int attr_mask, struct ib_udata *udata)
|
||||
{
|
||||
struct erdma_mod_qp_params_rocev2 params;
|
||||
struct erdma_qp *qp = to_eqp(ibqp);
|
||||
int ret = 0, erdma_attr_mask = 0;
|
||||
|
||||
down_write(&qp->state_lock);
|
||||
|
||||
ret = erdma_check_qp_attr_rocev2(qp, attr, attr_mask);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
erdma_init_mod_qp_params_rocev2(qp, ¶ms, &erdma_attr_mask, attr,
|
||||
attr_mask);
|
||||
|
||||
ret = erdma_modify_qp_state_rocev2(qp, ¶ms, erdma_attr_mask);
|
||||
|
||||
out:
|
||||
up_write(&qp->state_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int erdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
|
||||
struct ib_udata *udata)
|
||||
{
|
||||
|
|
@ -1920,6 +2089,22 @@ int erdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index, u16 *pkey)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void erdma_set_av_cfg(struct erdma_av_cfg *av_cfg, struct erdma_av *av)
|
||||
{
|
||||
av_cfg->cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_AV_FL_MASK, av->flow_label) |
|
||||
FIELD_PREP(ERDMA_CMD_CREATE_AV_NTYPE_MASK, av->ntype);
|
||||
|
||||
av_cfg->traffic_class = av->traffic_class;
|
||||
av_cfg->hop_limit = av->hop_limit;
|
||||
av_cfg->sl = av->sl;
|
||||
|
||||
av_cfg->udp_sport = av->udp_sport;
|
||||
av_cfg->sgid_index = av->sgid_index;
|
||||
|
||||
ether_addr_copy(av_cfg->dmac, av->dmac);
|
||||
memcpy(av_cfg->dgid, av->dgid, ERDMA_ROCEV2_GID_SIZE);
|
||||
}
|
||||
|
||||
int erdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *init_attr,
|
||||
struct ib_udata *udata)
|
||||
{
|
||||
|
|
@ -1948,38 +2133,14 @@ int erdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *init_attr,
|
|||
udp_sport =
|
||||
IB_ROCE_UDP_ENCAP_VALID_PORT_MIN + (ah->ahn & 0x3FFF);
|
||||
|
||||
ah->av.port = rdma_ah_get_port_num(init_attr->ah_attr);
|
||||
ah->av.sgid_index = grh->sgid_index;
|
||||
ah->av.hop_limit = grh->hop_limit;
|
||||
ah->av.traffic_class = grh->traffic_class;
|
||||
ah->av.sl = rdma_ah_get_sl(init_attr->ah_attr);
|
||||
ah->av.flow_label = grh->flow_label;
|
||||
ah->av.udp_sport = udp_sport;
|
||||
|
||||
ether_addr_copy(ah->av.dmac, init_attr->ah_attr->roce.dmac);
|
||||
memcpy(ah->av.dgid, grh->dgid.raw, ERDMA_ROCEV2_GID_SIZE);
|
||||
|
||||
if (ipv6_addr_v4mapped((struct in6_addr *)&grh->dgid))
|
||||
ah->av.ntype = ERDMA_NETWORK_TYPE_IPV4;
|
||||
else
|
||||
ah->av.ntype = ERDMA_NETWORK_TYPE_IPV6;
|
||||
erdma_attr_to_av(init_attr->ah_attr, &ah->av, udp_sport);
|
||||
|
||||
erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
|
||||
CMDQ_OPCODE_CREATE_AH);
|
||||
|
||||
req.pdn = pd->pdn;
|
||||
req.ahn = ah->ahn;
|
||||
|
||||
req.av_cfg.cfg0 =
|
||||
FIELD_PREP(ERDMA_CMD_CREATE_AV_FL_MASK, ah->av.flow_label) |
|
||||
FIELD_PREP(ERDMA_CMD_CREATE_AV_NTYPE_MASK, ah->av.ntype);
|
||||
req.av_cfg.traffic_class = ah->av.traffic_class;
|
||||
req.av_cfg.hop_limit = ah->av.hop_limit;
|
||||
req.av_cfg.sl = ah->av.sl;
|
||||
req.av_cfg.udp_sport = ah->av.udp_sport;
|
||||
req.av_cfg.sgid_index = ah->av.sgid_index;
|
||||
ether_addr_copy(req.av_cfg.dmac, ah->av.dmac);
|
||||
memcpy(req.av_cfg.dgid, ah->av.dgid, ERDMA_ROCEV2_GID_SIZE);
|
||||
erdma_set_av_cfg(&req.av_cfg, &ah->av);
|
||||
|
||||
ret = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
|
||||
if (ret) {
|
||||
|
|
|
|||
|
|
@ -216,10 +216,46 @@ enum erdma_qp_attr_mask {
|
|||
ERDMA_QP_ATTR_MPA = (1 << 7)
|
||||
};
|
||||
|
||||
enum erdma_qps_rocev2 {
|
||||
ERDMA_QPS_ROCEV2_RESET = 0,
|
||||
ERDMA_QPS_ROCEV2_INIT = 1,
|
||||
ERDMA_QPS_ROCEV2_RTR = 2,
|
||||
ERDMA_QPS_ROCEV2_RTS = 3,
|
||||
ERDMA_QPS_ROCEV2_SQD = 4,
|
||||
ERDMA_QPS_ROCEV2_SQE = 5,
|
||||
ERDMA_QPS_ROCEV2_ERROR = 6,
|
||||
ERDMA_QPS_ROCEV2_COUNT = 7,
|
||||
};
|
||||
|
||||
enum erdma_qpa_mask_rocev2 {
|
||||
ERDMA_QPA_ROCEV2_STATE = (1 << 0),
|
||||
ERDMA_QPA_ROCEV2_QKEY = (1 << 1),
|
||||
ERDMA_QPA_ROCEV2_AV = (1 << 2),
|
||||
ERDMA_QPA_ROCEV2_SQ_PSN = (1 << 3),
|
||||
ERDMA_QPA_ROCEV2_RQ_PSN = (1 << 4),
|
||||
ERDMA_QPA_ROCEV2_DST_QPN = (1 << 5),
|
||||
};
|
||||
|
||||
enum erdma_qp_flags {
|
||||
ERDMA_QP_IN_FLUSHING = (1 << 0),
|
||||
};
|
||||
|
||||
struct erdma_mod_qp_params_rocev2 {
|
||||
enum erdma_qps_rocev2 state;
|
||||
u32 qkey;
|
||||
u32 sq_psn;
|
||||
u32 rq_psn;
|
||||
u32 dst_qpn;
|
||||
struct erdma_av av;
|
||||
};
|
||||
|
||||
struct erdma_qp_attrs_rocev2 {
|
||||
enum erdma_qps_rocev2 state;
|
||||
u32 qkey;
|
||||
u32 dst_qpn;
|
||||
struct erdma_av av;
|
||||
};
|
||||
|
||||
struct erdma_qp_attrs {
|
||||
enum erdma_qp_state state;
|
||||
enum erdma_cc_alg cc; /* Congestion control algorithm */
|
||||
|
|
@ -234,6 +270,7 @@ struct erdma_qp_attrs {
|
|||
#define ERDMA_QP_PASSIVE 1
|
||||
u8 qp_type;
|
||||
u8 pd_len;
|
||||
struct erdma_qp_attrs_rocev2 rocev2;
|
||||
};
|
||||
|
||||
struct erdma_qp {
|
||||
|
|
@ -307,6 +344,9 @@ void erdma_qp_get(struct erdma_qp *qp);
|
|||
void erdma_qp_put(struct erdma_qp *qp);
|
||||
int erdma_modify_qp_internal(struct erdma_qp *qp, struct erdma_qp_attrs *attrs,
|
||||
enum erdma_qp_attr_mask mask);
|
||||
int erdma_modify_qp_state_rocev2(struct erdma_qp *qp,
|
||||
struct erdma_mod_qp_params_rocev2 *params,
|
||||
int attr_mask);
|
||||
void erdma_qp_llp_close(struct erdma_qp *qp);
|
||||
void erdma_qp_cm_drop(struct erdma_qp *qp);
|
||||
|
||||
|
|
@ -386,6 +426,8 @@ int erdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int mask,
|
|||
struct ib_qp_init_attr *init_attr);
|
||||
int erdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int mask,
|
||||
struct ib_udata *data);
|
||||
int erdma_modify_qp_rocev2(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
||||
int mask, struct ib_udata *udata);
|
||||
int erdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata);
|
||||
int erdma_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata);
|
||||
void erdma_disassociate_ucontext(struct ib_ucontext *ibcontext);
|
||||
|
|
@ -404,6 +446,7 @@ int erdma_post_send(struct ib_qp *ibqp, const struct ib_send_wr *send_wr,
|
|||
int erdma_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *recv_wr,
|
||||
const struct ib_recv_wr **bad_recv_wr);
|
||||
int erdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
|
||||
void erdma_remove_cqes_of_qp(struct ib_cq *ibcq, u32 qpn);
|
||||
struct ib_mr *erdma_ib_alloc_mr(struct ib_pd *ibpd, enum ib_mr_type mr_type,
|
||||
u32 max_num_sg);
|
||||
int erdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
|
||||
|
|
@ -419,6 +462,7 @@ enum rdma_link_layer erdma_get_link_layer(struct ib_device *ibdev,
|
|||
int erdma_add_gid(const struct ib_gid_attr *attr, void **context);
|
||||
int erdma_del_gid(const struct ib_gid_attr *attr, void **context);
|
||||
int erdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index, u16 *pkey);
|
||||
void erdma_set_av_cfg(struct erdma_av_cfg *av_cfg, struct erdma_av *av);
|
||||
int erdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *init_attr,
|
||||
struct ib_udata *udata);
|
||||
int erdma_destroy_ah(struct ib_ah *ibah, u32 flags);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user