From 0c187cca73291f2c355fae31eed3fc7aa783b2de Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Wed, 1 Feb 2023 20:58:47 +0100 Subject: [PATCH 1/4] arm: dts: meson: adjust order of some compatibles During review of a new yaml binding, affecting these dts, it turned out that some compatibles aren't ordered as they should be. Order should be most specific to least specific. Suggested-by: Rob Herring Signed-off-by: Heiner Kallweit Reviewed-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/66f77c32-2678-3e31-fb00-1294ccaa6045@gmail.com Signed-off-by: Neil Armstrong --- arch/arm/boot/dts/meson8b.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index d5a3fe21e8e7..5979209fe91e 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -580,8 +580,8 @@ ðmac { }; &gpio_intc { - compatible = "amlogic,meson-gpio-intc", - "amlogic,meson8b-gpio-intc"; + compatible = "amlogic,meson8b-gpio-intc", + "amlogic,meson-gpio-intc"; status = "okay"; }; From 4ca4a633205fb372882de3e6e93a0a3584298249 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Tue, 21 Mar 2023 18:12:11 +0100 Subject: [PATCH 2/4] ARM: dts: meson8: add the xtal_32k_out pin GPIOX_10 can generate a 32768Hz signal when enabling the "xtal_32k_out" group with the xtal function. This is typically used as LPO clock for the SDIO wifi chips. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20230321171213.2808460-2-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong --- arch/arm/boot/dts/meson8.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 21eb59041a7d..4d18bb4e3c33 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -568,6 +568,14 @@ mux { bias-disable; }; }; + + xtal_32k_out_pins: xtal-32k-out { + mux { + groups = "xtal_32k_out"; + function = "xtal"; + bias-disable; + }; + }; }; }; From ef8474d50a37ab5f2f2f60e179d749b4273470de Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Tue, 21 Mar 2023 18:12:12 +0100 Subject: [PATCH 3/4] ARM: dts: meson8: add the SDXC_A pins Add the pins for the SDHC MMC controller which connect to the SDIO wifi on some boards. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20230321171213.2808460-3-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong --- arch/arm/boot/dts/meson8.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 4d18bb4e3c33..4f22ab451aae 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -506,6 +506,15 @@ mux { }; }; + sdxc_a_pins: sdxc-a { + mux { + groups = "sdxc_d0_a", "sdxc_d13_a", + "sdxc_clk_a", "sdxc_cmd_a"; + function = "sdxc_a"; + bias-pull-up; + }; + }; + sdxc_b_pins: sdxc-b { mux { groups = "sdxc_d0_b", "sdxc_d13_b", From 8446b84c894f7441f8bf4410f9638e38dcb29c49 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Tue, 21 Mar 2023 18:12:13 +0100 Subject: [PATCH 4/4] ARM: dts: meson8m2: mxiii-plus: Enable Bluetooth and WiFi support The MXIII Plus uses an Ampak AP6330 Bluetooth and WiFi combo chip. Bluetooth is connected to &uart_A and requires toggling GPIOX_20. WiFi can be routed to either &sdhc or &sdio. Route WiFi to &sdhc since &sdio is already connected to the SD card. Additionally WiFi requires toggling GPIOX_11 and GPIOAO_6 as well as enabling the 32kHz clock signal. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20230321171213.2808460-4-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong --- arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 48 ++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts index fa6d55f1cfb9..aa4d4bf70629 100644 --- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts +++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts @@ -19,7 +19,6 @@ aliases { ethernet0 = ðmac; i2c0 = &i2c_AO; serial0 = &uart_AO; - serial1 = &uart_A; mmc0 = &sd_card_slot; }; @@ -45,12 +44,32 @@ button-function { }; }; + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + + pinctrl-0 = <&xtal_32k_out_pins>; + pinctrl-names = "default"; + + reset-gpios = <&gpio GPIOX_11 GPIO_ACTIVE_LOW>, + <&gpio_ao GPIOAO_6 GPIO_ACTIVE_LOW>; + + clocks = <&xtal_32k_out>; + clock-names = "ext_clock"; + }; + vcc_3v3: regulator-vcc3v3 { compatible = "regulator-fixed"; regulator-name = "VCC3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + xtal_32k_out: xtal-32k-out-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xtal_32k_out"; + }; }; &cpu0 { @@ -192,6 +211,27 @@ &saradc { vref-supply = <&vddio_ao1v8>; }; +/* SDIO wifi */ +&sdhc { + status = "okay"; + + pinctrl-0 = <&sdxc_a_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + max-frequency = <50000000>; + + disable-wp; + non-removable; + cap-mmc-highspeed; + cap-sd-highspeed; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_3v3>; +}; + &sdio { status = "okay"; @@ -222,6 +262,12 @@ &uart_A { pinctrl-0 = <&uart_a1_pins>, <&uart_a1_cts_rts_pins>; pinctrl-names = "default"; uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm20702a1"; + shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + }; }; &uart_AO {