drm/amdgpu: add TA_RAS_INV_NODE value

We can set UMC node instance to invalid state if we use global channel
index, and RAS TA can choose UMC address conversion approach by checking
node_inst value.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tao Zhou 2024-10-18 14:43:04 +08:00 committed by Alex Deucher
parent f44a30583b
commit 95024c714b

View File

@ -30,6 +30,9 @@
#define RSP_ID_MASK (1U << 31)
#define RSP_ID(cmdId) (((uint32_t)(cmdId)) | RSP_ID_MASK)
/* invalid node instance value */
#define TA_RAS_INV_NODE 0xffff
/* RAS related enumerations */
/**********************************************************/
enum ras_command {