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gpu: nova-core: increase BAR0 size to 16MB

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The Turing+ register address space spans over that range, so increase it
as future patches will access more registers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Link: https://lore.kernel.org/r/20250619-nova-frts-v6-10-ecf41ef99252@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
This commit is contained in:
Alexandre Courbot 2025-06-19 22:23:54 +09:00 committed by Danilo Krummrich
parent e66aaaffe0
commit 94a0872143
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/nova-core/driver.rs
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
use kernel::{auxiliary, bindings, c_str, device::Core, pci, prelude::*};
use kernel::{auxiliary, bindings, c_str, device::Core, pci, prelude::*, sizes::SZ_16M};
use crate::gpu::Gpu;
@ -11,7 +11,7 @@ pub(crate) struct NovaCore {
_reg: auxiliary::Registration,
}
const BAR0_SIZE: usize = 8;
const BAR0_SIZE: usize = SZ_16M;
pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>;
kernel::pci_device_table!(