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ARM: dts: aspeed: bletchley: add pca9536 node on each sled

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Add an ioexp node on each sled baseed on DVT schematic, address at 0x41.

P0: SLEDX_SWD_MUX
P1: SLEDX_XRES_SWD_N
P2: SLEDX_CLKREQ_N
P3: SLEDX_PCIE_PWR_EN

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Potin Lai 2022-05-09 23:11:17 +08:00 committed by Joel Stanley
parent 60280a214a
commit 9495c6d570
1 changed files with 66 additions and 0 deletions
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66
arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
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@ -253,6 +253,17 @@ tmp421@4f {
reg = <0x4f>;
};
sled1_ioexp41: pca9536@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED1_SWD_MUX", "SLED1_XRES_SWD_N",
"SLED1_CLKREQ_N", "SLED1_PCIE_PWR_EN";
};
sled1_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
@ -323,6 +334,17 @@ tmp421@4f {
reg = <0x4f>;
};
sled2_ioexp41: pca9536@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED2_SWD_MUX", "SLED2_XRES_SWD_N",
"SLED2_CLKREQ_N", "SLED2_PCIE_PWR_EN";
};
sled2_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
@ -393,6 +415,17 @@ tmp421@4f {
reg = <0x4f>;
};
sled3_ioexp41: pca9536@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED3_SWD_MUX", "SLED3_XRES_SWD_N",
"SLED3_CLKREQ_N", "SLED3_PCIE_PWR_EN";
};
sled3_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
@ -463,6 +496,17 @@ tmp421@4f {
reg = <0x4f>;
};
sled4_ioexp41: pca9536@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED4_SWD_MUX", "SLED4_XRES_SWD_N",
"SLED4_CLKREQ_N", "SLED4_PCIE_PWR_EN";
};
sled4_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
@ -533,6 +577,17 @@ tmp421@4f {
reg = <0x4f>;
};
sled5_ioexp41: pca9536@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED5_SWD_MUX", "SLED5_XRES_SWD_N",
"SLED5_CLKREQ_N", "SLED5_PCIE_PWR_EN";
};
sled5_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
@ -603,6 +658,17 @@ tmp421@4f {
reg = <0x4f>;
};
sled6_ioexp41: pca9536@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED6_SWD_MUX", "SLED6_XRES_SWD_N",
"SLED6_CLKREQ_N", "SLED6_PCIE_PWR_EN";
};
sled6_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;